From patchwork Sat Aug 13 15:34:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 12942778 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 47048C19F2D for ; Sat, 13 Aug 2022 15:53:25 +0000 (UTC) Received: from localhost ([::1]:37922 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1oMtS0-0001kn-DV for qemu-devel@archiver.kernel.org; Sat, 13 Aug 2022 11:53:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52742) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oMt9x-0000XN-IN; Sat, 13 Aug 2022 11:34:45 -0400 Received: from zero.eik.bme.hu ([152.66.115.2]:28342) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1oMt9v-0006LN-Fd; Sat, 13 Aug 2022 11:34:45 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id DD44174819C; Sat, 13 Aug 2022 17:34:41 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id B0E8674818E; Sat, 13 Aug 2022 17:34:41 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Subject: [PATCH 14/22] ppc/ppc405: Use an embedded PPCUIC model in SoC state MIME-Version: 1.0 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Cc: clg@kaod.org, Daniel Henrique Barboza , Peter Maydell Date: Sat, 13 Aug 2022 17:34:41 +0200 (CEST) Received-SPF: pass client-ip=152.66.115.2; envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" From: Cédric Le Goater Signed-off-by: Cédric Le Goater Signed-off-by: BALATON Zoltan --- hw/ppc/ppc405.h | 3 ++- hw/ppc/ppc405_uc.c | 28 ++++++++++++++-------------- 2 files changed, 16 insertions(+), 15 deletions(-) diff --git a/hw/ppc/ppc405.h b/hw/ppc/ppc405.h index c0251f0894..5bcbce2893 100644 --- a/hw/ppc/ppc405.h +++ b/hw/ppc/ppc405.h @@ -27,6 +27,7 @@ #include "qom/object.h" #include "hw/ppc/ppc4xx.h" +#include "hw/intc/ppc-uic.h" #define PPC405EP_SDRAM_BASE 0x00000000 #define PPC405EP_NVRAM_BASE 0xF0000000 @@ -208,7 +209,7 @@ struct Ppc405SoCState { hwaddr ram_size; PowerPCCPU cpu; - DeviceState *uic; + PPCUIC uic; Ppc405CpcState cpc; Ppc405GptState gpt; Ppc405OcmState ocm; diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index 01625e3237..82830f52bf 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -1080,6 +1080,8 @@ static void ppc405_soc_instance_init(Object *obj) object_initialize_child(obj, "cpu", &s->cpu, POWERPC_CPU_TYPE_NAME("405ep")); + object_initialize_child(obj, "uic", &s->uic, TYPE_PPC_UIC); + object_initialize_child(obj, "cpc", &s->cpc, TYPE_PPC405_CPC); object_property_add_alias(obj, "sys-clk", OBJECT(&s->cpc), "sys-clk"); @@ -1147,17 +1149,15 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp) sysbus_mmio_map(sbd, 0, 0xef600600); /* Universal interrupt controller */ - s->uic = qdev_new(TYPE_PPC_UIC); - - object_property_set_link(OBJECT(s->uic), "cpu", OBJECT(&s->cpu), + object_property_set_link(OBJECT(&s->uic), "cpu", OBJECT(&s->cpu), &error_fatal); - if (!sysbus_realize(SYS_BUS_DEVICE(s->uic), errp)) { + sbd = SYS_BUS_DEVICE(&s->uic); + if (!sysbus_realize(sbd, errp)) { return; } - - sysbus_connect_irq(SYS_BUS_DEVICE(s->uic), PPCUIC_OUTPUT_INT, + sysbus_connect_irq(sbd, PPCUIC_OUTPUT_INT, qdev_get_gpio_in(DEVICE(&s->cpu), PPC40x_INPUT_INT)); - sysbus_connect_irq(SYS_BUS_DEVICE(s->uic), PPCUIC_OUTPUT_CINT, + sysbus_connect_irq(sbd, PPCUIC_OUTPUT_CINT, qdev_get_gpio_in(DEVICE(&s->cpu), PPC40x_INPUT_CINT)); /* SDRAM controller */ @@ -1168,7 +1168,7 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp) "ppc405.sdram0", s->dram_mr, s->ram_bases[0], s->ram_sizes[0]); - ppc4xx_sdram_init(env, qdev_get_gpio_in(s->uic, 17), 1, + ppc4xx_sdram_init(env, qdev_get_gpio_in(DEVICE(&s->uic), 17), 1, s->ram_banks, s->ram_bases, s->ram_sizes, s->do_dram_init); @@ -1183,12 +1183,12 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp) } sbd = SYS_BUS_DEVICE(&s->dma); for (i = 0; i < ARRAY_SIZE(s->dma.irqs); i++) { - sysbus_connect_irq(sbd, i, qdev_get_gpio_in(s->uic, 5 + i)); + sysbus_connect_irq(sbd, i, qdev_get_gpio_in(DEVICE(&s->uic), 5 + i)); } /* I2C controller */ sysbus_create_simple(TYPE_PPC4xx_I2C, 0xef600500, - qdev_get_gpio_in(s->uic, 2)); + qdev_get_gpio_in(DEVICE(&s->uic), 2)); /* GPIO */ sbd = SYS_BUS_DEVICE(&s->gpio); @@ -1200,13 +1200,13 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp) /* Serial ports */ if (serial_hd(0) != NULL) { serial_mm_init(get_system_memory(), 0xef600300, 0, - qdev_get_gpio_in(s->uic, 0), + qdev_get_gpio_in(DEVICE(&s->uic), 0), PPC_SERIAL_MM_BAUDBASE, serial_hd(0), DEVICE_BIG_ENDIAN); } if (serial_hd(1) != NULL) { serial_mm_init(get_system_memory(), 0xef600400, 0, - qdev_get_gpio_in(s->uic, 1), + qdev_get_gpio_in(DEVICE(&s->uic), 1), PPC_SERIAL_MM_BAUDBASE, serial_hd(1), DEVICE_BIG_ENDIAN); } @@ -1223,7 +1223,7 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp) } sysbus_mmio_map(sbd, 0, 0xef600000); for (i = 0; i < ARRAY_SIZE(s->gpt.irqs); i++) { - sysbus_connect_irq(sbd, i, qdev_get_gpio_in(s->uic, 19 + i)); + sysbus_connect_irq(sbd, i, qdev_get_gpio_in(DEVICE(&s->uic), 19 + i)); } /* MAL */ @@ -1234,7 +1234,7 @@ static void ppc405_soc_realize(DeviceState *dev, Error **errp) } sbd = SYS_BUS_DEVICE(&s->mal); for (i = 0; i < ARRAY_SIZE(s->mal.irqs); i++) { - sysbus_connect_irq(sbd, i, qdev_get_gpio_in(s->uic, 11 + i)); + sysbus_connect_irq(sbd, i, qdev_get_gpio_in(DEVICE(&s->uic), 11 + i)); } /* Ethernet */