From patchwork Fri Nov 22 09:11:30 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mauro Carvalho Chehab X-Patchwork-Id: 13882935 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 800E9E65D17 for ; Fri, 22 Nov 2024 09:15:41 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1tEPhv-0002Fh-SZ; Fri, 22 Nov 2024 04:12:08 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tEPhk-0002Aa-Ho; Fri, 22 Nov 2024 04:11:56 -0500 Received: from dfw.source.kernel.org ([139.178.84.217]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1tEPhg-0000tc-Gl; Fri, 22 Nov 2024 04:11:55 -0500 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 7213B5C59D7; Fri, 22 Nov 2024 09:11:05 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 76C05C4CED1; Fri, 22 Nov 2024 09:11:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1732266708; bh=hJXdm+o+Qg2Q0Ak/9rfyKRugnUJHbORHdHLMHQnys24=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bXchZ+Pyl9gL0P0J3RAOfRkZGPQMToOi8b3/NLYLu6PDbUgyyFIyRnKOOtdj/vzmJ GLH5FEHFHYiG9p0S1NLcG85bIik3neETZ1TbG9qllnP079i0E8sJzK0oL0ADWhJRJI r3UZapF1u/5tdFcmTpYud6s9A+7uurEZh7u/Zaem9LnwHIVppFinV/NDjJxKzTL6yd /Zr3+qmSEwymL9VTS+tR4+SAkPOUGdPI2FMAOjfJVy0+hpgdGzMMvc65NxhHygebB0 hKdMlZdlAK9E40wzC1pbCVV8jV1TIBL2SJYkllY1rA65aqEJ4W7xLE9XvhJ+2FzmGy D5LOwh/BRtr7w== Received: from mchehab by mail.kernel.org with local (Exim 4.98) (envelope-from ) id 1tEPhX-00000006l4A-1CV3; Fri, 22 Nov 2024 10:11:43 +0100 From: Mauro Carvalho Chehab To: Igor Mammedov Cc: Jonathan Cameron , Shiju Jose , Mauro Carvalho Chehab , "Michael S. Tsirkin" , Ani Sinha , Dongjiu Geng , linux-kernel@vger.kernel.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v4 13/15] acpi/ghes: move offset calculus to a separate function Date: Fri, 22 Nov 2024 10:11:30 +0100 Message-ID: X-Mailer: git-send-email 2.47.0 In-Reply-To: References: MIME-Version: 1.0 Received-SPF: pass client-ip=139.178.84.217; envelope-from=mchehab+huawei@kernel.org; helo=dfw.source.kernel.org X-Spam_score_int: -71 X-Spam_score: -7.2 X-Spam_bar: ------- X-Spam_report: (-7.2 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.14, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_HI=-5, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Currently, CPER address location is calculated as an offset of the hardware_errors table. It is also badly named, as the offset actually used is the address where the CPER data starts, and not the beginning of the error source. Move the logic which calculates such offset to a separate function, in preparation for a patch that will be changing the logic to calculate it from the HEST table. While here, properly name the variable which stores the cper address. Signed-off-by: Mauro Carvalho Chehab Reviewed-by: Jonathan Cameron --- hw/acpi/ghes.c | 41 ++++++++++++++++++++++++++++++++--------- 1 file changed, 32 insertions(+), 9 deletions(-) diff --git a/hw/acpi/ghes.c b/hw/acpi/ghes.c index 87fd3feedd2a..d99697b20164 100644 --- a/hw/acpi/ghes.c +++ b/hw/acpi/ghes.c @@ -364,10 +364,37 @@ void acpi_ghes_add_fw_cfg(AcpiGhesState *ags, FWCfgState *s, ags->present = true; } +static void get_hw_error_offsets(uint64_t ghes_addr, + uint64_t *cper_addr, + uint64_t *read_ack_register_addr) +{ + if (!ghes_addr) { + return; + } + + /* + * non-HEST version supports only one source, so no need to change + * the start offset based on the source ID. Also, we can't validate + * the source ID, as it is stored inside the HEST table. + */ + + cpu_physical_memory_read(ghes_addr, cper_addr, + sizeof(*cper_addr)); + + *cper_addr = le64_to_cpu(*cper_addr); + + /* + * As the current version supports only one source, the ack offset is + * just sizeof(uint64_t). + */ + *read_ack_register_addr = ghes_addr + + ACPI_GHES_ERROR_SOURCE_COUNT * sizeof(uint64_t); +} + void ghes_record_cper_errors(const void *cper, size_t len, uint16_t source_id, Error **errp) { - uint64_t error_block_addr, read_ack_register_addr, read_ack_register = 0; + uint64_t cper_addr = 0, read_ack_register_addr = 0, read_ack_register; uint64_t start_addr; AcpiGedState *acpi_ged_state; AcpiGhesState *ags; @@ -389,18 +416,14 @@ void ghes_record_cper_errors(const void *cper, size_t len, start_addr += source_id * sizeof(uint64_t); - cpu_physical_memory_read(start_addr, &error_block_addr, - sizeof(error_block_addr)); + get_hw_error_offsets(start_addr, &cper_addr, &read_ack_register_addr); - error_block_addr = le64_to_cpu(error_block_addr); - if (!error_block_addr) { + cper_addr = le64_to_cpu(cper_addr); + if (!cper_addr) { error_setg(errp, "can not find Generic Error Status Block"); return; } - read_ack_register_addr = start_addr + - ACPI_GHES_ERROR_SOURCE_COUNT * sizeof(uint64_t); - cpu_physical_memory_read(read_ack_register_addr, &read_ack_register, sizeof(read_ack_register)); @@ -421,7 +444,7 @@ void ghes_record_cper_errors(const void *cper, size_t len, &read_ack_register, sizeof(uint64_t)); /* Write the generic error data entry into guest memory */ - cpu_physical_memory_write(error_block_addr, cper, len); + cpu_physical_memory_write(cper_addr, cper, len); return; }