@@ -23,6 +23,7 @@
#include "qemu/error-report.h"
#include "qemu/log.h"
#include "qemu/module.h"
+#include "qemu/units.h"
#include "hw/irq.h"
#include "hw/ppc/ppc.h"
#include "hw/ppc/ppc4xx.h"
@@ -491,10 +492,11 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp)
s = PPC440_PCIX_HOST_BRIDGE(dev);
sysbus_init_irq(sbd, &s->irq);
- memory_region_init(&s->busmem, OBJECT(dev), "pci bus memory", UINT64_MAX);
+ memory_region_init(&s->busmem, OBJECT(dev), "pci-mem", UINT64_MAX);
+ memory_region_init(&s->iomem, OBJECT(dev), "pci-io", 64 * KiB);
h->bus = pci_register_root_bus(dev, NULL, ppc440_pcix_set_irq,
- ppc440_pcix_map_irq, &s->irq, &s->busmem,
- get_system_io(), PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS);
+ ppc440_pcix_map_irq, &s->irq, &s->busmem, &s->iomem,
+ PCI_DEVFN(0, 0), 1, TYPE_PCI_BUS);
s->dev = pci_create_simple(h->bus, PCI_DEVFN(0, 0), "ppc4xx-host-bridge");
@@ -514,6 +516,7 @@ static void ppc440_pcix_realize(DeviceState *dev, Error **errp)
memory_region_add_subregion(&s->container, PCIC0_CFGDATA, &h->data_mem);
memory_region_add_subregion(&s->container, PPC440_REG_BASE, &s->regs);
sysbus_init_mmio(sbd, &s->container);
+ sysbus_init_mmio(sbd, &s->iomem);
}
static void ppc440_pcix_class_init(ObjectClass *klass, void *data)
@@ -269,7 +269,6 @@ static void main_cpu_reset(void *opaque)
static void sam460ex_init(MachineState *machine)
{
- MemoryRegion *isa = g_new(MemoryRegion, 1);
MemoryRegion *l2cache_ram = g_new(MemoryRegion, 1);
DeviceState *uic[4];
int i;
@@ -441,12 +440,9 @@ static void sam460ex_init(MachineState *machine)
/* All PCI irqs are connected to the same UIC pin (cf. UBoot source) */
dev = sysbus_create_simple("ppc440-pcix-host", 0xc0ec00000,
qdev_get_gpio_in(uic[1], 0));
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, 0xc08000000);
pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci.0"));
- memory_region_init_alias(isa, NULL, "isa_mmio", get_system_io(),
- 0, 0x10000);
- memory_region_add_subregion(get_system_memory(), 0xc08000000, isa);
-
/* PCI devices */
pci_create_simple(pci_bus, PCI_DEVFN(6, 0), "sm501");
/* SoC has a single SATA port but we don't emulate that yet