From patchwork Fri Sep 7 17:43:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Fredrik Noring X-Patchwork-Id: 10620903 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C163115A6 for ; Sat, 29 Sep 2018 17:33:57 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id A242B29F18 for ; Sat, 29 Sep 2018 17:33:57 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9129A29F1C; Sat, 29 Sep 2018 17:33:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-4.5 required=2.0 tests=BAYES_00,DATE_IN_PAST_96_XX, MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.wl.linuxfoundation.org (Postfix) with ESMTPS id D5BA729F18 for ; Sat, 29 Sep 2018 17:33:56 +0000 (UTC) Received: from localhost ([::1]:51733 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g6J7r-0007Bq-J7 for patchwork-qemu-devel@patchwork.kernel.org; Sat, 29 Sep 2018 13:33:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59233) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1g6J6e-0005z7-WE for qemu-devel@nongnu.org; Sat, 29 Sep 2018 13:32:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1g6J6b-0005kI-Rd for qemu-devel@nongnu.org; Sat, 29 Sep 2018 13:32:40 -0400 Received: from pio-pvt-msa1.bahnhof.se ([79.136.2.40]:39278) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1g6J6b-0005jW-K4 for qemu-devel@nongnu.org; Sat, 29 Sep 2018 13:32:37 -0400 Received: from localhost (localhost [127.0.0.1]) by pio-pvt-msa1.bahnhof.se (Postfix) with ESMTP id 409103F60E; Sat, 29 Sep 2018 19:32:35 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at bahnhof.se X-Amavis-Alert: BAD HEADER SECTION, Non-encoded 8-bit data (char C3 hex): To: ...>, \n \tPhilippe Mathieu-Daud\303\203\302\251 Received: from pio-pvt-msa1.bahnhof.se ([127.0.0.1]) by localhost (pio-pvt-msa1.bahnhof.se [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id zOuZW3e-DhSL; Sat, 29 Sep 2018 19:32:31 +0200 (CEST) Received: from localhost (h-155-4-135-114.NA.cust.bahnhof.se [155.4.135.114]) (Authenticated sender: mb547485) by pio-pvt-msa1.bahnhof.se (Postfix) with ESMTPA id 1EBC63F5BA; Sat, 29 Sep 2018 19:32:31 +0200 (CEST) X-Mailbox-Line: From ff4721b7a1049a96a054bd215542a8e6633ceafd Mon Sep 17 00:00:00 2001 Message-Id: In-Reply-To: References: From: Fredrik Noring Date: Fri, 7 Sep 2018 19:43:36 +0200 To: =?unknown-8bit?q?Aleksandar_Markovic_=3Camarkovic=40wavecomp=2Ecom=3E=2C?= =?unknown-8bit?q?_=22Maciej_W=2E_Rozycki=22_=3Cmacro=40linux-mips=2Eorg=3E?= =?unknown-8bit?q?=2C?= =?unknown-8bit?q?_Philippe_Mathieu-Daud=C3=A9_=3Cf4bug=40amsat=2Eorg=3E?= X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 79.136.2.40 Subject: [Qemu-devel] [PATCH v6 1/7] target/mips: Define R5900 instructions and CPU preprocessor constants X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?unknown-8bit?q?Peter_Maydell_=3Cpeter=2Emaydell=40linaro=2Eorg=3E=2C_R?= =?unknown-8bit?q?ichard_Henderson_=3Crichard=2Ehenderson=40linaro=2Eorg=3E?= =?unknown-8bit?q?=2C_qemu-devel=40nongnu=2Eorg=2C_J=C3=BCrgen_Urban_=3CJuer?= =?unknown-8bit?q?genUrban=40gmx=2Ede=3E=2C_Petar_Jovanovic_=3Cpjovanovic=40?= =?unknown-8bit?q?wavecomp=2Ecom=3E=2C_Aurelien_Jarno_=3Caurelien=40aurel32?= =?unknown-8bit?q?=2Enet=3E?= Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" X-Virus-Scanned: ClamAV using ClamSMTP The R5900 implements the 64-bit MIPS III instruction set except DMULT, DMULTU, DDIV, DDIVU, LL, SC, LLD and SCD. The MIPS IV instructions MOVN, MOVZ and PREF are implemented. It has the R5900 specific three-operand instructions MADD, MADDU, MULT and MULTU as well as pipeline 1 versions MULT1, MULTU1, DIV1, DIVU1, MADD1, MADDU1, MFHI1, MFLO1, MTHI1 and MTLO1. A set of 93 128-bit multimedia instructions specific to the R5900 is also implemented. The Toshiba TX System RISC TX79 Core Architecture manual http://www.lukasz.dk/files/tx79architecture.pdf describes the C790 processor that is a follow-up to the R5900. There are a few notable differences in that the R5900 FPU - is not IEEE 754-1985 compliant, - does not implement double format, and - its machine code is nonstandard. Signed-off-by: Fredrik Noring Reviewed-by: Philippe Mathieu-Daudé --- target/mips/mips-defs.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index c8e99791ad..76550de2da 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -53,6 +53,7 @@ #define ASE_MSA 0x01000000 /* Chip specific instructions. */ +#define INSN_R5900 0x10000000 #define INSN_LOONGSON2E 0x20000000 #define INSN_LOONGSON2F 0x40000000 #define INSN_VR54XX 0x80000000 @@ -63,6 +64,7 @@ #define CPU_MIPS3 (CPU_MIPS2 | ISA_MIPS3) #define CPU_MIPS4 (CPU_MIPS3 | ISA_MIPS4) #define CPU_VR54XX (CPU_MIPS4 | INSN_VR54XX) +#define CPU_R5900 (CPU_MIPS3 | INSN_R5900) #define CPU_LOONGSON2E (CPU_MIPS3 | INSN_LOONGSON2E) #define CPU_LOONGSON2F (CPU_MIPS3 | INSN_LOONGSON2F)