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Wed, 2 Dec 2020 08:04:21 +0000 From: Yash Shah To: linux-spi@vger.kernel.org, linux-serial@vger.kernel.org, linux-pwm@vger.kernel.org, linux-i2c@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org Cc: broonie@kernel.org, gregkh@linuxfoundation.org, aou@eecs.berkeley.edu, lee.jones@linaro.org, u.kleine-koenig@pengutronix.de, thierry.reding@gmail.com, andrew@lunn.ch, peter@korsgaard.com, paul.walmsley@sifive.com, palmer@dabbelt.com, robh+dt@kernel.org, bgolaszewski@baylibre.com, linus.walleij@linaro.org, sachin.ghadi@sifive.com, Yash Shah Subject: [PATCH 0/4] arch: riscv: add board and SoC DT file support Date: Wed, 2 Dec 2020 13:33:52 +0530 Message-Id: <1606896236-62780-1-git-send-email-yash.shah@sifive.com> X-Mailer: git-send-email 2.7.4 X-Originating-IP: [159.117.144.156] X-ClientProxiedBy: BMXPR01CA0018.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:d::28) To CH2PR13MB4458.namprd13.prod.outlook.com (2603:10b6:610:6c::22) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from osubuntu003.open-silicon.com (159.117.144.156) by BMXPR01CA0018.INDPRD01.PROD.OUTLOOK.COM (2603:1096:b00:d::28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3632.17 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: xrZbnmfzMCMOKGqA+uzHGzc/lugSrCqRj7RGVDAPpqvBb3mhkiuOheYsDBlZRjdRh57URFM5F0AY2bs4kj7KswlhhFiKDZh9LJew1V9ibCikOtizL6BlcIkDnsyTovyg+HLYZifr/U6FvZRFwXlosyu9si9odFLrllOqe9mVJCv/n0MqoQ5COudPc3o1ly4q4bMSNHTbKqd9O2tuUB7Pw/sGD/hgUa8eCIbD72wV+J+5TtGtUDwzEiF2TVtsVNbwMLiAbP06Op+QobVP+GPrpot+cElfLbP/DBafZZzQsI+m1fkqH1IyGGgbCayBxiBR20DuofmVhWhfOy81VhTu0yoy0KXOGyzRXBGqdX6uFRq2MNOPViCRSD5fSkKzOoKz3r4Z4JjjoMGjijRJVNfOWMNH/0PeIIn/R0sCbJ/cUvBI92heAg8dU8yEWGSVJM1ufGw35bGHOS5zN9dzKMVJi0Mm1wqtabGLoeyyZ3djTrJDbG6XG+8ekkQep5wuHBo/TvDx4JTSMPmCRQ4SPMbEPEZURLl+/IjK3Y39VX2vPJb0V1h2wWFmDhx9w1ULfk3UBYXHzYMLas28PUCF/0aORWsskqLDYgo+78/R6XFWg3xCVpIqlkLuaOo6uY8iSHAMx1tdVr6LxzwsAaAm/uAJmz00LxRXRxfY6jteCLvrEQ4OIuVQ5GjqTX4e9FHFAtTnIBAIJFnP299dei4Tt2J2X5h7zbnEa8g2YKcQBpTpbZuRQQdoBq7K3QAsNqv9pbEEsPEZ7PZoprc7xQMjX/UFOJyDWoLiYN4bnpKVWjigKkNLBVNs4lwWnisPvrZQn6FrujYfOTnlAV5s6yUfFvzDkY4dhmyev7t65Lv1YJQm9XfkuwsdjQ+2G008YvWd/1fOu+3niMfWWcFdMyWNV7lz1lVcqWupLhTPOcWx+u1BJ1s/UHiuoMVnKSG0sonKw+5AsrmR/ED+NSFgP8u44GzZoPwC7m6f55otZ7v9QPnBawwSWPKHZYOSv6+OH0Uq89rt X-OriginatorOrg: sifive.com X-MS-Exchange-CrossTenant-AuthSource: CH2PR13MB4458.namprd13.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 02 Dec 2020 08:04:21.1058 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 22f88e9d-ae0d-4ed9-b984-cdc9be1529f1 X-MS-Exchange-CrossTenant-Network-Message-Id: c5c9a6a6-70c0-4851-34f0-08d89698e02d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: MIMwcXU6BWM1mESFxVQjKIOxqBF1R79qgVW7rvr8gi4r2iES8JIUP2kUG3DRWfXsd/BsC/HMwLwH9bjx0g5X5w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH2PR13MB3543 Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org Start board support by adding initial support for the SiFive FU740 SoC and the first development board that uses it, the SiFive HiFive Unmatched A00. Boot-tested on Linux 5.10-rc4 on a HiFive Unmatched A00 board using the U-boot and OpenSBI. This patch series is dependent on Zong's Patchset[0]. The patchset also adds two new nodes in dtsi file. The binding documentation patch for these nodes are already posted on the mailing list[1][2]. [0]: https://lore.kernel.org/linux-riscv/20201130082330.77268-4-zong.li@sifive.com/T/#u [1]: https://lore.kernel.org/linux-riscv/1606714984-16593-1-git-send-email-yash.shah@sifive.com/T/#t [2]: https://lore.kernel.org/linux-riscv/20201126030043.67390-1-zong.li@sifive.com/T/#u Yash Shah (4): dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC riscv: dts: add initial support for the SiFive FU740-C000 SoC dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board riscv: dts: add initial board data for the SiFive HiFive Unmatched .../devicetree/bindings/gpio/sifive,gpio.yaml | 4 +- .../devicetree/bindings/i2c/i2c-ocores.txt | 6 +- .../devicetree/bindings/pwm/pwm-sifive.yaml | 9 +- Documentation/devicetree/bindings/riscv/cpus.yaml | 6 + .../devicetree/bindings/riscv/sifive.yaml | 17 +- .../devicetree/bindings/serial/sifive-serial.yaml | 4 +- .../devicetree/bindings/spi/spi-sifive.yaml | 10 +- arch/riscv/boot/dts/sifive/Makefile | 3 +- arch/riscv/boot/dts/sifive/fu740-c000.dtsi | 293 +++++++++++++++++++++ .../riscv/boot/dts/sifive/hifive-unmatched-a00.dts | 253 ++++++++++++++++++ 10 files changed, 588 insertions(+), 17 deletions(-) create mode 100644 arch/riscv/boot/dts/sifive/fu740-c000.dtsi create mode 100644 arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dts