| Message ID | 20190402144023.27422-1-geert+renesas@glider.be (mailing list archive) |
|---|---|
| Headers | show |
| Series | spi: sh-msiof: Add reset of registers before starting transfer | expand |
> - New patches 1 and 2, in response to review comments on v1 > (although sh_msiof_modify_ctr_wait() didn't turn out to be suitable > for calling by sh_msiof_spi_reset_regs()), Well, the overhead of readl_poll_timeout_atomic() is low enough to ignore reusing sh_msiof_modify_ctr_wait IMO. Thanks for doing it!
Hi Wolfram, On Tue, Apr 2, 2019 at 4:47 PM Wolfram Sang <wsa@the-dreams.de> wrote: > > - New patches 1 and 2, in response to review comments on v1 > > (although sh_msiof_modify_ctr_wait() didn't turn out to be suitable > > for calling by sh_msiof_spi_reset_regs()), > > Well, the overhead of readl_poll_timeout_atomic() is low enough to > ignore reusing sh_msiof_modify_ctr_wait IMO. Thanks for doing it! sh_msiof_modify_ctr_wait() cannot be used because it checks when the change just made to the register becomes visible (i.e. new state can be read back). For reset the check is different: the write sets the bit, the check must wait until the hardware has cleared the bit again. Gr{oetje,eeting}s, Geert
Hi Mark, This patch series resets the MSIOF registers before starting a transfer, to comply with the procedure documented in the Hardware Manual. Changes compared to v1: - New patches 1 and 2, in response to review comments on v1 (although sh_msiof_modify_ctr_wait() didn't turn out to be suitable for calling by sh_msiof_spi_reset_regs()), - Use BIT(), - Use readl_poll_timeout_atomic(). Thanks! Geert Uytterhoeven (3): spi: sh-msiof: Use BIT() and GENMASK() spi: sh-msiof: Use readl_poll_timeout_atomic() instead of open-coding spi: sh-msiof: Add reset of registers before starting transfer drivers/spi/spi-sh-msiof.c | 204 ++++++++++++++++++++----------------- 1 file changed, 108 insertions(+), 96 deletions(-)