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[v2,0/7] spi: zynq-qspi: Clarify and fix the chip selection

Message ID 20191108140744.1734-1-miquel.raynal@bootlin.com (mailing list archive)
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Series spi: zynq-qspi: Clarify and fix the chip selection | expand


Miquel Raynal Nov. 8, 2019, 2:07 p.m. UTC

While working on SPI-NOR support I figured the chip select handling of
the Zynq 7000 QSPI driver was not behaving as I would have
expected. While cheking out what was wrong I decided to clarify things
around so I did a bit of cleaning. The step-by-step changes are the
reason for patches [1-6]. This way, the last patch actually adding
support for both CS is much more understandable.


Changes since v1:
* Rebased on top of v5.4-rc6 and fixed all the conflicts
  (minors). Compile tested only (actual testing done on a v5.1).

Miquel Raynal (7):
  spi: zynq-qspi: Anything else than CS0 is not supported yet
  spi: zynq-qspi: Keep the naming consistent across the driver
  spi: zynq-qspi: Keep the bitfields naming consistent
  spi: zynq-qspi: Enhance the Linear CFG bit definitions
  spi: zynq-qspi: Clarify the select chip function
  spi: zynq-qspi: Do the actual hardware initialization later in the
  spi: zynq-qspi: Support two chip selects

 drivers/spi/spi-zynq-qspi.c | 83 ++++++++++++++++++++++---------------
 1 file changed, 50 insertions(+), 33 deletions(-)