mbox series

[v5,0/3] MTD: spinand: Add spi_mem_poll_status() support

Message ID 20210518162754.15940-1-patrice.chotard@foss.st.com (mailing list archive)
Headers show
Series MTD: spinand: Add spi_mem_poll_status() support | expand

Message

Patrice CHOTARD May 18, 2021, 4:27 p.m. UTC
From: Patrice Chotard <patrice.chotard@foss.st.com>

This series adds support for the spi_mem_poll_status() spinand
interface.
Some QSPI controllers allows to poll automatically memory 
status during operations (erase, read or write). This allows to 
offload the CPU for this task.
STM32 QSPI is supporting this feature, driver update are also
part of this series.

Changes in v5:
  - Update spi_mem_read_status() description.
  - Update poll_status() description API by indicating that data buffer is
    filled with last status value.
  - Update timeout parameter by timeout_ms in spi_mem_poll_status() prototype.
  - Remove parenthesys arount -EINVAL in spi_mem_poll_status().
  - Add missing spi_mem_supports_op() call in stm32_qspi_poll_status().
  - Add Boris Reviewed-by for patch 1 and 2.

Changes in v4:
  - Remove init_completion() from spi_mem_probe() added in v2.
  - Add missing static for spi_mem_read_status().
  - Check if operation in spi_mem_poll_status() is a READ.
  - Update patch 2 commit message.
  - Add comment which explains how delays has been calculated.
  - Rename SPINAND_STATUS_TIMEOUT_MS to SPINAND_WAITRDY_TIMEOUT_MS.

Chnages in v3:
  - Add spi_mem_read_status() which allows to read 8 or 16 bits status.
  - Add initial_delay_us and polling_delay_us parameters to spi_mem_poll_status().
    and also to poll_status() callback.
  - Move spi_mem_supports_op() in SW-based polling case.
  - Add delay before invoquing read_poll_timeout().
  - Remove the reinit/wait_for_completion() added in v2.
  - Add initial_delay_us and polling_delay_us parameters to spinand_wait().
  - Add SPINAND_READ/WRITE/ERASE/RESET_INITIAL_DELAY_US and
    SPINAND_READ/WRITE/ERASE/RESET_POLL_DELAY_US defines.
  - Remove spi_mem_finalize_op() API added in v2.

Changes in v2:
  - Indicates the spi_mem_poll_status() timeout unit
  - Use 2-byte wide status register
  - Add spi_mem_supports_op() call in spi_mem_poll_status()
  - Add completion management in spi_mem_poll_status()
  - Add offload/non-offload case management in spi_mem_poll_status()
  - Optimize the non-offload case by using read_poll_timeout()
  - mask and match stm32_qspi_poll_status()'s parameters are 2-byte wide
  - Make usage of new spi_mem_finalize_op() API in
    stm32_qspi_wait_poll_status()

Patrice Chotard (3):
  spi: spi-mem: add automatic poll status functions
  mtd: spinand: use the spi-mem poll status APIs
  spi: stm32-qspi: add automatic poll status feature

 drivers/mtd/nand/spi/core.c  | 45 +++++++++++++------
 drivers/spi/spi-mem.c        | 86 ++++++++++++++++++++++++++++++++++++
 drivers/spi/spi-stm32-qspi.c | 86 ++++++++++++++++++++++++++++++++----
 include/linux/mtd/spinand.h  | 22 +++++++++
 include/linux/spi/spi-mem.h  | 16 +++++++
 5 files changed, 234 insertions(+), 21 deletions(-)

Comments

Mark Brown May 19, 2021, 7:18 p.m. UTC | #1
On Tue, May 18, 2021 at 06:27:51PM +0200, patrice.chotard@foss.st.com wrote:
> From: Patrice Chotard <patrice.chotard@foss.st.com>
> 
> This series adds support for the spi_mem_poll_status() spinand
> interface.
> Some QSPI controllers allows to poll automatically memory 
> status during operations (erase, read or write). This allows to 
> offload the CPU for this task.
> STM32 QSPI is supporting this feature, driver update are also
> part of this series.

The SPI bits look good to me - should we merge via MTD or SPI?
Miquel Raynal May 26, 2021, 8:32 a.m. UTC | #2
Hi Mark,

Mark Brown <broonie@kernel.org> wrote on Wed, 19 May 2021 20:18:36
+0100:

> On Tue, May 18, 2021 at 06:27:51PM +0200, patrice.chotard@foss.st.com wrote:
> > From: Patrice Chotard <patrice.chotard@foss.st.com>
> > 
> > This series adds support for the spi_mem_poll_status() spinand
> > interface.
> > Some QSPI controllers allows to poll automatically memory 
> > status during operations (erase, read or write). This allows to 
> > offload the CPU for this task.
> > STM32 QSPI is supporting this feature, driver update are also
> > part of this series.  
> 
> The SPI bits look good to me - should we merge via MTD or SPI?

I don't expect any conflicts with the current changes in MTD, I just
acked the SPI-NAND patch, you may take it through SPI.

Thanks,
Miquèl
Mark Brown June 3, 2021, 6:41 p.m. UTC | #3
On Tue, 18 May 2021 18:27:51 +0200, patrice.chotard@foss.st.com wrote:
> This series adds support for the spi_mem_poll_status() spinand
> interface.
> Some QSPI controllers allows to poll automatically memory
> status during operations (erase, read or write). This allows to
> offload the CPU for this task.
> STM32 QSPI is supporting this feature, driver update are also
> part of this series.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/3] spi: spi-mem: add automatic poll status functions
      commit: c955a0cc8a286e5da1ebb88c19201e9bab8c2422
[2/3] mtd: spinand: use the spi-mem poll status APIs
      commit: 8941cd8d295e40f8ea1c0a5045d6d068b8e33eec
[3/3] spi: stm32-qspi: add automatic poll status feature
      commit: 86d1c6bbae32122c5f703b2d8acccf5d4258f2bb

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark