From patchwork Thu Aug 4 00:20:10 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Toshiharu Okada X-Patchwork-Id: 1033672 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.4) with ESMTP id p740V75i021281 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Thu, 4 Aug 2011 00:31:28 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1Qolpx-00048k-4G; Thu, 04 Aug 2011 00:30:57 +0000 Received: from sog-mx-1.v43.ch3.sourceforge.com ([172.29.43.191] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1Qolpv-00048V-8S for spi-devel-general@lists.sourceforge.net; Thu, 04 Aug 2011 00:30:55 +0000 X-ACL-Warn: Received: from sm-d311v.smileserver.ne.jp ([203.211.202.206]) by sog-mx-1.v43.ch3.sourceforge.com with esmtp (Exim 4.76) id 1Qolpt-0004JN-Ml for spi-devel-general@lists.sourceforge.net; Thu, 04 Aug 2011 00:30:55 +0000 X-Virus-Status: clean(F-Secure/virusgw_smtp/403/viruscheck2-00.private.hosting-pf.net) Received: from PC20903 (unknown [122.210.32.228]) by sm-d311v.smileserver.ne.jp (mail) with SMTP id DD55596D7D; Thu, 4 Aug 2011 09:30:45 +0900 (JST) Message-ID: <06E5A35FD5B340D6A7022BD0298B1A83@hacdom.okisemi.com> From: "Toshiharu Okada" To: "Toshiharu Okada" , , , References: <1311141414-12867-1-git-send-email-toshiharu-linux@dsn.okisemi.com> Subject: Re: [PATCH] spi_topcliff_pch: supports a spi mode setup and bit order setup by IO control Date: Thu, 4 Aug 2011 09:20:10 +0900 MIME-Version: 1.0 X-Priority: 3 X-MSMail-Priority: Normal X-Mailer: Microsoft Outlook Express 6.00.2900.5931 X-MimeOLE: Produced By Microsoft MimeOLE V6.00.2900.6109 X-Spam-Score: 0.0 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. X-Headers-End: 1Qolpt-0004JN-Ml Cc: tomoya-linux@dsn.okisemi.com, kok.howg.ewe@intel.com, qi.wang@intel.com, joel.clark@intel.com, yong.y.wang@intel.com X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 04 Aug 2011 00:31:28 +0000 (UTC) Hi Grant, Could you review this patch? Thanks in advance. Best Regards Toshiharu Okada ----- Original Message ----- Sent: Wednesday, July 20, 2011 2:56 PM Subject: [PATCH] spi_topcliff_pch: supports a spi mode setup and bit order setup by IO control This patch supports a spi mode setup and bit order setup by IO control. spi mode: mode 0 to mode 3 bit order: LSB first, MSB first Signed-off-by: Toshiharu Okada --- drivers/spi/spi_topcliff_pch.c | 1 + 1 files changed, 1 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi_topcliff_pch.c b/drivers/spi/spi_topcliff_pch.c index 79e48d4..dec83c9 100644 --- a/drivers/spi/spi_topcliff_pch.c +++ b/drivers/spi/spi_topcliff_pch.c @@ -1038,6 +1038,7 @@ static int pch_spi_probe(struct pci_dev *pdev, const struct pci_device_id *id) master->num_chipselect = PCH_MAX_CS; master->setup = pch_spi_setup; master->transfer = pch_spi_transfer; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; dev_dbg(&pdev->dev, "%s transfer member of SPI master initialized\n", __func__);