From patchwork Wed Sep 1 05:35:59 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Feng Tang X-Patchwork-Id: 146151 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o815AF6g003013 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 1 Sep 2010 05:10:51 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1OqfaN-0002QH-Do; Wed, 01 Sep 2010 05:10:11 +0000 Received: from sog-mx-1.v43.ch3.sourceforge.com ([172.29.43.191] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1OqfaM-0002QA-4h for spi-devel-general@lists.sourceforge.net; Wed, 01 Sep 2010 05:10:10 +0000 X-ACL-Warn: Received: from mga01.intel.com ([192.55.52.88]) by sog-mx-1.v43.ch3.sourceforge.com with esmtp (Exim 4.69) id 1OqfaK-0005ea-SK for spi-devel-general@lists.sourceforge.net; Wed, 01 Sep 2010 05:10:10 +0000 Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP; 31 Aug 2010 22:10:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="4.56,302,1280732400"; d="scan'208";a="602492481" Received: from feng-i7.sh.intel.com (HELO localhost.localdomain) ([10.239.14.14]) by fmsmga002.fm.intel.com with ESMTP; 31 Aug 2010 22:10:02 -0700 From: Feng Tang To: spi-devel-general@lists.sourceforge.net Subject: [PATCH] spi/dw_spi: clean the cs_control code Date: Wed, 1 Sep 2010 13:35:59 +0800 Message-Id: <1283319359-16297-1-git-send-email-feng.tang@intel.com> X-Mailer: git-send-email 1.7.0.4 X-Spam-Score: -0.0 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 0.0 AWL AWL: From: address is in the auto white-list X-Headers-End: 1OqfaK-0005ea-SK Cc: David Brownell , George Shore X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 01 Sep 2010 05:10:51 +0000 (UTC) diff --git a/drivers/spi/dw_spi.c b/drivers/spi/dw_spi.c index d256cb0..4b75a81 100644 --- a/drivers/spi/dw_spi.c +++ b/drivers/spi/dw_spi.c @@ -181,10 +181,6 @@ static void flush(struct dw_spi *dws) wait_till_not_busy(dws); } -static void null_cs_control(u32 command) -{ -} - static int null_writer(struct dw_spi *dws) { u8 n_bytes = dws->n_bytes; @@ -322,7 +318,7 @@ static void giveback(struct dw_spi *dws) struct spi_transfer, transfer_list); - if (!last_transfer->cs_change) + if (!last_transfer->cs_change && dws->cs_control) dws->cs_control(MRST_SPI_DEASSERT); msg->state = NULL; @@ -544,13 +540,13 @@ static void pump_transfers(unsigned long data) */ if (dws->cs_control) { if (dws->rx && dws->tx) - chip->tmode = 0x00; + chip->tmode = SPI_TMOD_TR; else if (dws->rx) - chip->tmode = 0x02; + chip->tmode = SPI_TMOD_RO; else - chip->tmode = 0x01; + chip->tmode = SPI_TMOD_TO; - cr0 &= ~(0x3 << SPI_MODE_OFFSET); + cr0 &= ~SPI_TMOD_MASK; cr0 |= (chip->tmode << SPI_TMOD_OFFSET); } @@ -699,9 +695,6 @@ static int dw_spi_setup(struct spi_device *spi) chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); if (!chip) return -ENOMEM; - - chip->cs_control = null_cs_control; - chip->enable_dma = 0; } /* diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h index cc813f9..cc9ded3 100644 --- a/include/linux/spi/dw_spi.h +++ b/include/linux/spi/dw_spi.h @@ -12,9 +12,12 @@ #define SPI_FRF_RESV 0x3 #define SPI_MODE_OFFSET 6 +#define SPI_MODE_MASK (0x3 << SPI_MODE_OFFSET) #define SPI_SCPH_OFFSET 6 #define SPI_SCOL_OFFSET 7 + #define SPI_TMOD_OFFSET 8 +#define SPI_TMOD_MASK (0x3 << SPI_TMOD_OFFSET) #define SPI_TMOD_TR 0x0 /* xmit & recv */ #define SPI_TMOD_TO 0x1 /* xmit only */ #define SPI_TMOD_RO 0x2 /* recv only */