From patchwork Fri Sep 10 16:19:36 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: wellsk40@gmail.com X-Patchwork-Id: 170632 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id o8ANJrSB025972 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 10 Sep 2010 23:20:14 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1OuCsr-0005LS-Bt; Fri, 10 Sep 2010 23:19:53 +0000 Received: from sog-mx-3.v43.ch3.sourceforge.com ([172.29.43.193] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1OuCsS-0005K4-MG for spi-devel-general@lists.sourceforge.net; Fri, 10 Sep 2010 23:19:28 +0000 Received-SPF: pass (sog-mx-3.v43.ch3.sourceforge.com: domain of gmail.com designates 209.85.216.47 as permitted sender) client-ip=209.85.216.47; envelope-from=wellsk40@gmail.com; helo=mail-qw0-f47.google.com; Received: from mail-qw0-f47.google.com ([209.85.216.47]) by sog-mx-3.v43.ch3.sourceforge.com with esmtp (Exim 4.69) id 1OuCsR-0007Tv-RH for spi-devel-general@lists.sourceforge.net; Fri, 10 Sep 2010 23:19:28 +0000 Received: by qwa26 with SMTP id 26so1777663qwa.34 for ; Fri, 10 Sep 2010 16:19:22 -0700 (PDT) Received: by 10.224.112.204 with SMTP id x12mr867799qap.170.1284160762516; Fri, 10 Sep 2010 16:19:22 -0700 (PDT) Received: from localhost6.localdomain6 (66-193-100-242.static.twtelecom.net [66.193.100.242]) by mx.google.com with ESMTPS id r38sm3294922qcs.14.2010.09.10.16.19.19 (version=SSLv3 cipher=RC4-MD5); Fri, 10 Sep 2010 16:19:22 -0700 (PDT) From: wellsk40@gmail.com To: linus.walleij@stericsson.com, spi-devel-general@lists.sourceforge.net Subject: [PATCH 2/5] ARM: LPC32XX: Add missing SPI mode and remove unused fields Date: Fri, 10 Sep 2010 09:19:36 -0700 Message-Id: <1284135579-13578-3-git-send-email-wellsk40@gmail.com> X-Mailer: git-send-email 1.7.2.2 In-Reply-To: <1284135579-13578-1-git-send-email-wellsk40@gmail.com> References: <1284135579-13578-1-git-send-email-wellsk40@gmail.com> X-Spam-Score: 1.6 (+) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/, low trust [209.85.216.47 listed in list.dnswl.org] -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain 0.0 FREEMAIL_FROM Sender email is freemail (wellsk40[at]gmail.com) 1.1 DATE_IN_PAST_06_12 Date: is 6 to 12 hours before Received: date -0.0 SPF_PASS SPF: sender matches SPF record 2.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (wellsk40[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.0 T_TO_NO_BRKTS_FREEMAIL T_TO_NO_BRKTS_FREEMAIL -0.1 AWL AWL: From: address is in the auto white-list X-Headers-End: 1OuCsR-0007Tv-RH Cc: rabin.vincent@stericsson.com, linux@arm.linux.org.uk, sameo@linux.intel.com, srinidhi.kasagar@stericsson.com, Lukasz.Baj@tieto.com, linux-kernel@vger.kernel.org, u.kleine-koenig@pengutronix.de, tj@kernel.org, linux-arm-kernel@lists.infradead.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Fri, 10 Sep 2010 23:20:16 +0000 (UTC) diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c index bc9a42d..0c936cf 100644 --- a/arch/arm/mach-lpc32xx/phy3250.c +++ b/arch/arm/mach-lpc32xx/phy3250.c @@ -172,18 +172,12 @@ static void phy3250_spi_cs_set(u32 control) } static struct pl022_config_chip spi0_chip_info = { - .lbm = LOOPBACK_DISABLED, .com_mode = INTERRUPT_TRANSFER, .iface = SSP_INTERFACE_MOTOROLA_SPI, .hierarchy = SSP_MASTER, .slave_tx_disable = 0, - .endian_tx = SSP_TX_LSB, - .endian_rx = SSP_RX_LSB, - .data_size = SSP_DATA_BITS_8, .rx_lev_trig = SSP_RX_4_OR_MORE_ELEM, .tx_lev_trig = SSP_TX_4_OR_MORE_EMPTY_LOC, - .clk_phase = SSP_CLK_FIRST_EDGE, - .clk_pol = SSP_CLK_POL_IDLE_LOW, .ctrl_len = SSP_BITS_8, .wait_state = SSP_MWIRE_WAIT_ZERO, .duplex = SSP_MICROWIRE_CHANNEL_FULL_DUPLEX, @@ -239,6 +233,7 @@ static int __init phy3250_spi_board_register(void) .max_speed_hz = 5000000, .bus_num = 0, .chip_select = 0, + .mode = SPI_MODE_0, .platform_data = &eeprom, .controller_data = &spi0_chip_info, },