From patchwork Wed Nov 17 10:43:46 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sekhar Nori X-Patchwork-Id: 332381 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oAHB4e6F017679 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 17 Nov 2010 11:05:02 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-3.v29.ch3.sourceforge.com) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1PIfoe-0000hP-Iq; Wed, 17 Nov 2010 11:04:40 +0000 Received: from sog-mx-1.v43.ch3.sourceforge.com ([172.29.43.191] helo=mx.sourceforge.net) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1PIfod-0000gw-9Z for spi-devel-general@lists.sourceforge.net; Wed, 17 Nov 2010 11:04:39 +0000 Received-SPF: pass (sog-mx-1.v43.ch3.sourceforge.com: domain of india.ti.com designates 192.94.94.41 as permitted sender) client-ip=192.94.94.41; envelope-from=a0875516@india.ti.com; helo=bear.ext.ti.com; Received: from bear.ext.ti.com ([192.94.94.41]) by sog-mx-1.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.69) id 1PIfoc-0004XV-EA; Wed, 17 Nov 2010 11:04:39 +0000 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id oAHAiWoQ011646 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 17 Nov 2010 04:44:34 -0600 Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id oAHAiR5M021852; Wed, 17 Nov 2010 16:14:28 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id oAHAiOSb030370; Wed, 17 Nov 2010 16:14:24 +0530 Received: (from a0875516@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id oAHAiORM030367; Wed, 17 Nov 2010 16:14:24 +0530 From: Sekhar Nori To: spi-devel-general@lists.sourceforge.net Subject: [PATCH 14/49] spi: davinci: setup chip-select timers values only if timer enabled Date: Wed, 17 Nov 2010 16:13:46 +0530 Message-Id: <1289990661-30126-15-git-send-email-nsekhar@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1289990661-30126-14-git-send-email-nsekhar@ti.com> References: <1289990661-30126-1-git-send-email-nsekhar@ti.com> <1289990661-30126-2-git-send-email-nsekhar@ti.com> <1289990661-30126-3-git-send-email-nsekhar@ti.com> <1289990661-30126-4-git-send-email-nsekhar@ti.com> <1289990661-30126-5-git-send-email-nsekhar@ti.com> <1289990661-30126-6-git-send-email-nsekhar@ti.com> <1289990661-30126-7-git-send-email-nsekhar@ti.com> <1289990661-30126-8-git-send-email-nsekhar@ti.com> <1289990661-30126-9-git-send-email-nsekhar@ti.com> <1289990661-30126-10-git-send-email-nsekhar@ti.com> <1289990661-30126-11-git-send-email-nsekhar@ti.com> <1289990661-30126-12-git-send-email-nsekhar@ti.com> <1289990661-30126-13-git-send-email-nsekhar@ti.com> <1289990661-30126-14-git-send-email-nsekhar@ti.com> X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record 0.0 AWL AWL: From: address is in the auto white-list X-Headers-End: 1PIfoc-0004XV-EA Cc: davinci-linux-open-source@linux.davincidsp.com, David Brownell , Sekhar Nori X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 17 Nov 2010 11:05:02 +0000 (UTC) diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 34b28fe..d09b63c 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -374,6 +374,10 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, if (spicfg->timer_disable) spifmt |= SPIFMT_DISTIMER_MASK; + else + iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | + (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), + davinci_spi->base + SPIDELAY); if (spi->mode & SPI_READY) spifmt |= SPIFMT_WAITENA_MASK; @@ -607,13 +611,9 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) u32 tx_data, data1_reg_val; u32 buf_val, flg_val; struct davinci_spi_platform_data *pdata; - struct davinci_spi_config *spicfg; davinci_spi = spi_master_get_devdata(spi->master); pdata = davinci_spi->pdata; - spicfg = (struct davinci_spi_config *)spi->controller_data; - if (!spicfg) - spicfg = &davinci_spi_default_cfg; davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; @@ -633,10 +633,6 @@ static int davinci_spi_bufs_pio(struct spi_device *spi, struct spi_transfer *t) /* Enable SPI */ set_io_bits(davinci_spi->base + SPIGCR1, SPIGCR1_SPIENA_MASK); - iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | - (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), - davinci_spi->base + SPIDELAY); - count = davinci_spi->count; /* Determine the command to execute READ or WRITE */ @@ -741,14 +737,10 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) struct davinci_spi_dma *davinci_spi_dma; int word_len, data_type, ret; unsigned long tx_reg, rx_reg; - struct davinci_spi_config *spicfg; struct device *sdev; davinci_spi = spi_master_get_devdata(spi->master); sdev = davinci_spi->bitbang.master->dev.parent; - spicfg = (struct davinci_spi_config *)spi->controller_data; - if (!spicfg) - spicfg = &davinci_spi_default_cfg; davinci_spi_dma = &davinci_spi->dma_channels[spi->chip_select]; @@ -784,11 +776,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (ret) return ret; - /* Put delay val if required */ - iowrite32((spicfg->c2tdelay << SPI_C2TDELAY_SHIFT) | - (spicfg->t2cdelay << SPI_T2CDELAY_SHIFT), - davinci_spi->base + SPIDELAY); - count = davinci_spi->count; /* the number of elements */ /* disable all interrupts for dma transfers */