From patchwork Wed Nov 17 10:44:11 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sekhar Nori X-Patchwork-Id: 332481 Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oAHB50Wc017977 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Wed, 17 Nov 2010 11:05:21 GMT Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1PIfoy-0002U4-EH; Wed, 17 Nov 2010 11:05:00 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.69) (envelope-from ) id 1PIfox-0002Tr-NQ for spi-devel-general@lists.sourceforge.net; Wed, 17 Nov 2010 11:04:59 +0000 Received-SPF: pass (sog-mx-4.v43.ch3.sourceforge.com: domain of india.ti.com designates 198.47.26.152 as permitted sender) client-ip=198.47.26.152; envelope-from=a0875516@india.ti.com; helo=comal.ext.ti.com; Received: from comal.ext.ti.com ([198.47.26.152]) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.69) id 1PIfow-000387-L9; Wed, 17 Nov 2010 11:04:59 +0000 Received: from dbdp31.itg.ti.com ([172.24.170.98]) by comal.ext.ti.com (8.13.7/8.13.7) with ESMTP id oAHAiZQp008423 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 17 Nov 2010 04:44:37 -0600 Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by dbdp31.itg.ti.com (8.13.8/8.13.8) with ESMTP id oAHAiULR021924; Wed, 17 Nov 2010 16:14:31 +0530 (IST) Received: from psplinux051.india.ti.com (localhost [127.0.0.1]) by psplinux051.india.ti.com (8.13.1/8.13.1) with ESMTP id oAHAiQZ8030531; Wed, 17 Nov 2010 16:14:26 +0530 Received: (from a0875516@localhost) by psplinux051.india.ti.com (8.13.1/8.13.1/Submit) id oAHAiQhA030528; Wed, 17 Nov 2010 16:14:26 +0530 From: Sekhar Nori To: spi-devel-general@lists.sourceforge.net Subject: [PATCH 39/49] spi: davinci: handle DMA completion errors correctly Date: Wed, 17 Nov 2010 16:14:11 +0530 Message-Id: <1289990661-30126-40-git-send-email-nsekhar@ti.com> X-Mailer: git-send-email 1.6.2.4 In-Reply-To: <1289990661-30126-39-git-send-email-nsekhar@ti.com> References: <1289990661-30126-1-git-send-email-nsekhar@ti.com> <1289990661-30126-2-git-send-email-nsekhar@ti.com> <1289990661-30126-3-git-send-email-nsekhar@ti.com> <1289990661-30126-4-git-send-email-nsekhar@ti.com> <1289990661-30126-5-git-send-email-nsekhar@ti.com> <1289990661-30126-6-git-send-email-nsekhar@ti.com> <1289990661-30126-7-git-send-email-nsekhar@ti.com> <1289990661-30126-8-git-send-email-nsekhar@ti.com> <1289990661-30126-9-git-send-email-nsekhar@ti.com> <1289990661-30126-10-git-send-email-nsekhar@ti.com> <1289990661-30126-11-git-send-email-nsekhar@ti.com> <1289990661-30126-12-git-send-email-nsekhar@ti.com> <1289990661-30126-13-git-send-email-nsekhar@ti.com> <1289990661-30126-14-git-send-email-nsekhar@ti.com> <1289990661-30126-15-git-send-email-nsekhar@ti.com> <1289990661-30126-16-git-send-email-nsekhar@ti.com> <1289990661-30126-17-git-send-email-nsekhar@ti.com> <1289990661-30126-18-git-send-email-nsekhar@ti.com> <1289990661-30126-19-git-send-email-nsekhar@ti.com> <1289990661-30126-20-git-send-email-nsekhar@ti.com> <1289990661-30126-21-git-send-email-nsekhar@ti.com> <1289990661-30126-22-git-send-email-nsekhar@ti.com> <1289990661-30126-23-git-send-email-nsekhar@ti.com> <1289990661-30126-24-git-send-email-nsekhar@ti.com> <1289990661-30126-25-git-send-email-nsekhar@ti.com> <1289990661-30126-26-git-send-email-nsekhar@ti.com> <1289990661-30126-27-git-send-email-nsekhar@ti.com> <1289990661-30126-28-git-send-email-nsekhar@ti.com> <1289990661-30126-29-git-send-email-nsekhar@ti.com> <1289990661-30126-30-git-send-email-nsekhar@ti.com> <1289990661-30126-31-git-send-email-nsekhar@ti.com> <1289990661-30126-32-git-send-email-nsekhar@ti.com> <1289990661-30126-33-git-send-email-nsekhar@ti.com> <1289990661-30126-34-git-send-email-nsekhar@ti.com> <1289990661-30126-35-git-send-email-nsekhar@ti.com> <1289990661-30126-36-git-send-email-nsekhar@ti.com> <1289990661-30126-37-git-send-email-nsekhar@ti.com> <1289990661-30126-38-git-send-email-nsekhar@ti.com> <1289990661-30126-39-git-send-email-nsekhar@ti.com> X-Spam-Score: -1.5 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. 0.0 SINGLE_HEADER_2K A single header contains 2K-3K characters -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.0 SPF_PASS SPF: sender matches SPF record 0.1 AWL AWL: From: address is in the auto white-list X-Headers-End: 1PIfow-000387-L9 Cc: davinci-linux-open-source@linux.davincidsp.com, David Brownell , Sekhar Nori X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Wed, 17 Nov 2010 11:05:21 +0000 (UTC) diff --git a/drivers/spi/davinci_spi.c b/drivers/spi/davinci_spi.c index 975c2a2..a47947d 100644 --- a/drivers/spi/davinci_spi.c +++ b/drivers/spi/davinci_spi.c @@ -388,24 +388,26 @@ static int davinci_spi_setup_transfer(struct spi_device *spi, static void davinci_spi_dma_rx_callback(unsigned lch, u16 ch_status, void *data) { - struct davinci_spi_dma *davinci_spi_dma = data; + struct davinci_spi *davinci_spi = data; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + + edma_stop(davinci_spi_dma->dma_rx_channel); if (ch_status == DMA_COMPLETE) - edma_stop(davinci_spi_dma->dma_rx_channel); - else - edma_clean_channel(davinci_spi_dma->dma_rx_channel); + davinci_spi->rcount = 0; complete(&davinci_spi_dma->dma_rx_completion); } static void davinci_spi_dma_tx_callback(unsigned lch, u16 ch_status, void *data) { - struct davinci_spi_dma *davinci_spi_dma = data; + struct davinci_spi *davinci_spi = data; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; + + edma_stop(davinci_spi_dma->dma_tx_channel); if (ch_status == DMA_COMPLETE) - edma_stop(davinci_spi_dma->dma_tx_channel); - else - edma_clean_channel(davinci_spi_dma->dma_tx_channel); + davinci_spi->wcount = 0; complete(&davinci_spi_dma->dma_tx_completion); } @@ -632,7 +634,6 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) { struct davinci_spi *davinci_spi; int int_status = 0; - int count; unsigned rx_buf_count; struct davinci_spi_dma *davinci_spi_dma; int data_type, ret; @@ -648,20 +649,20 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) davinci_spi_dma = &davinci_spi->dma_channels; + /* convert len to words based on bits_per_word */ + data_type = davinci_spi->bytes_per_word[spi->chip_select]; + tx_reg = (unsigned long)davinci_spi->pbase + SPIDAT1; rx_reg = (unsigned long)davinci_spi->pbase + SPIBUF; davinci_spi->tx = t->tx_buf; davinci_spi->rx = t->rx_buf; - - /* convert len to words based on bits_per_word */ - data_type = davinci_spi->bytes_per_word[spi->chip_select]; + davinci_spi->wcount = t->len / data_type; + davinci_spi->rcount = davinci_spi->wcount; init_completion(&davinci_spi_dma->dma_rx_completion); init_completion(&davinci_spi_dma->dma_tx_completion); - count = t->len / data_type; /* the number of elements */ - /* disable all interrupts for dma transfers */ clear_io_bits(davinci_spi->base + SPIINT, SPIINT_MASKALL); /* Enable SPI */ @@ -680,18 +681,18 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) */ if (t->tx_buf) { - t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, count, - DMA_TO_DEVICE); + t->tx_dma = dma_map_single(&spi->dev, (void *)t->tx_buf, + davinci_spi->wcount, DMA_TO_DEVICE); if (dma_mapping_error(&spi->dev, t->tx_dma)) { - dev_dbg(sdev, "Unable to DMA map a %d bytes" - " TX buffer\n", count); + dev_dbg(sdev, "Unable to DMA map %d bytes TX buffer\n", + davinci_spi->wcount); return -ENOMEM; } } param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_tx_channel); param.src = t->tx_buf ? t->tx_dma : tx_reg; - param.a_b_cnt = count << 16 | data_type; + param.a_b_cnt = davinci_spi->wcount << 16 | data_type; param.dst = tx_reg; param.src_dst_bidx = t->tx_buf ? data_type : 0; param.link_bcntrld = 0xffff; @@ -715,7 +716,7 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (t->rx_buf) { rx_buf = t->rx_buf; - rx_buf_count = count; + rx_buf_count = davinci_spi->rcount; } else { rx_buf = davinci_spi->rx_tmp_buf; rx_buf_count = sizeof(davinci_spi->rx_tmp_buf); @@ -727,13 +728,14 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) dev_dbg(sdev, "Couldn't DMA map a %d bytes RX buffer\n", rx_buf_count); if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE); + dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, + DMA_TO_DEVICE); return -ENOMEM; } param.opt = TCINTEN | EDMA_TCC(davinci_spi_dma->dma_rx_channel); param.src = rx_reg; - param.a_b_cnt = count << 16 | data_type; + param.a_b_cnt = davinci_spi->rcount << 16 | data_type; param.dst = t->rx_dma; param.src_dst_bidx = (t->rx_buf ? data_type : 0) << 16; param.link_bcntrld = 0xffff; @@ -754,7 +756,8 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) wait_for_completion_interruptible(&davinci_spi_dma->dma_rx_completion); if (t->tx_buf) - dma_unmap_single(NULL, t->tx_dma, count, DMA_TO_DEVICE); + dma_unmap_single(NULL, t->tx_dma, davinci_spi->wcount, + DMA_TO_DEVICE); dma_unmap_single(NULL, t->rx_dma, rx_buf_count, DMA_FROM_DEVICE); @@ -770,15 +773,21 @@ static int davinci_spi_bufs_dma(struct spi_device *spi, struct spi_transfer *t) if (ret != 0) return ret; + if (davinci_spi->rcount != 0 || davinci_spi->wcount != 0) { + dev_err(sdev, "SPI data transfer error\n"); + return -EIO; + } + return t->len; } -static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma) +static int davinci_spi_request_dma(struct davinci_spi *davinci_spi) { int r; + struct davinci_spi_dma *davinci_spi_dma = &davinci_spi->dma_channels; r = edma_alloc_channel(davinci_spi_dma->dma_rx_channel, - davinci_spi_dma_rx_callback, davinci_spi_dma, + davinci_spi_dma_rx_callback, davinci_spi, davinci_spi_dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI RX\n"); @@ -787,7 +796,7 @@ static int davinci_spi_request_dma(struct davinci_spi_dma *davinci_spi_dma) } r = edma_alloc_channel(davinci_spi_dma->dma_tx_channel, - davinci_spi_dma_tx_callback, davinci_spi_dma, + davinci_spi_dma_tx_callback, davinci_spi, davinci_spi_dma->eventq); if (r < 0) { pr_err("Unable to request DMA channel for SPI TX\n"); @@ -929,7 +938,7 @@ static int davinci_spi_probe(struct platform_device *pdev) davinci_spi->dma_channels.dma_tx_channel = dma_tx_chan; davinci_spi->dma_channels.eventq = dma_eventq; - ret = davinci_spi_request_dma(&davinci_spi->dma_channels); + ret = davinci_spi_request_dma(davinci_spi); if (ret) goto free_clk;