From patchwork Wed Aug 22 13:49:19 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Roland Stigge X-Patchwork-Id: 1361341 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork2.kernel.org (Postfix) with ESMTP id D24D7DF280 for ; Wed, 22 Aug 2012 13:49:57 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-3.v29.ch3.sourceforge.com) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1T4BJi-00023M-Vt; Wed, 22 Aug 2012 13:49:54 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-3.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1T4BJh-000238-Ol for spi-devel-general@lists.sourceforge.net; Wed, 22 Aug 2012 13:49:53 +0000 X-ACL-Warn: Received: from mail.work-microwave.de ([62.245.205.51] helo=work-microwave.de) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1T4BJd-0003mH-Gp for spi-devel-general@lists.sourceforge.net; Wed, 22 Aug 2012 13:49:53 +0000 Received: from rst-pc1.lan.work-microwave.de ([192.168.11.78]) (authenticated bits=0) by mail.work-microwave.de with ESMTP id q7MDnQOt015508 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Wed, 22 Aug 2012 14:49:27 +0100 Received: by rst-pc1.lan.work-microwave.de (Postfix, from userid 1000) id 1F9A5AE0A2; Wed, 22 Aug 2012 15:49:26 +0200 (CEST) From: Roland Stigge To: linus.walleij@linaro.org, aletes.xgr@gmail.com, broonie@opensource.wolfsonmicro.com, grant.likely@secretlab.ca, rob.herring@calxeda.com, rob@landley.net, devicetree-discuss@lists.ozlabs.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, spi-devel-general@lists.sourceforge.net, gabriel.fernandez@stericsson.com, lee.jones@linaro.org, viresh.kumar@linaro.org, sachin.verma@st.co Subject: [PATCH v6 3/3] DT bindings documentation: "num-cs" property for SPI controllers Date: Wed, 22 Aug 2012 15:49:19 +0200 Message-Id: <1345643359-16584-3-git-send-email-stigge@antcom.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1345643359-16584-1-git-send-email-stigge@antcom.de> References: <1345643359-16584-1-git-send-email-stigge@antcom.de> X-FEAS-SYSTEM-WL: rst@work-microwave.de, 192.168.11.78 X-Spam-Score: -0.1 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.2 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain 0.1 AWL AWL: From: address is in the auto white-list X-Headers-End: 1T4BJd-0003mH-Gp Cc: Roland Stigge X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net Several SPI controller drivers have defined differently named properties for the number of chip selects. Now adding "num-cs" as a reference name for new bindings. Signed-off-by: Roland Stigge Reviewed-by: Linus Walleij --- Documentation/devicetree/bindings/spi/spi-bus.txt | 3 +++ 1 file changed, 3 insertions(+) ------------------------------------------------------------------------------ Live Security Virtual Conference Exclusive live event will cover all the ways today's security and threat landscape has changed and how IT managers can respond. Discussions will include endpoint security, mobile security and the latest in malware threats. http://www.accelacomm.com/jaw/sfrnl04242012/114/50122263/ --- linux-2.6.orig/Documentation/devicetree/bindings/spi/spi-bus.txt +++ linux-2.6/Documentation/devicetree/bindings/spi/spi-bus.txt @@ -21,6 +21,9 @@ assumption that board specific platform chip selects. Individual drivers can define additional properties to support describing the chip select layout. +Optional property: +- num-cs : total number of chipselects + SPI slave nodes must be children of the SPI master node and can contain the following properties. - reg - (required) chip select address of device.