From patchwork Thu Dec 27 09:42:28 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabor Juhos X-Patchwork-Id: 1912601 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork1.kernel.org (Postfix) with ESMTP id 957AD40DED for ; Thu, 27 Dec 2012 09:59:02 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1ToAEw-000314-1D; Thu, 27 Dec 2012 09:59:02 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1ToAEt-0002za-TL for spi-devel-general@lists.sourceforge.net; Thu, 27 Dec 2012 09:58:59 +0000 X-ACL-Warn: Received: from arrakis.dune.hu ([78.24.191.176]) by sog-mx-4.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1ToAEq-0003u6-If for spi-devel-general@lists.sourceforge.net; Thu, 27 Dec 2012 09:58:59 +0000 Received: from arrakis.dune.hu ([127.0.0.1]) by localhost (arrakis.dune.hu [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ItQVfozRPrmb; Thu, 27 Dec 2012 10:41:44 +0100 (CET) Received: from localhost.localdomain (catvpool-576570d8.szarvasnet.hu [87.101.112.216]) by arrakis.dune.hu (Postfix) with ESMTPSA id 8127C280F3E; Thu, 27 Dec 2012 10:41:44 +0100 (CET) From: Gabor Juhos To: Grant Likely Subject: [PATCH 5/6] spi/ath79: avoid multiple initialization of the SPI controller Date: Thu, 27 Dec 2012 10:42:28 +0100 Message-Id: <1356601349-23617-6-git-send-email-juhosg@openwrt.org> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1356601349-23617-1-git-send-email-juhosg@openwrt.org> References: <1356601349-23617-1-git-send-email-juhosg@openwrt.org> X-Spam-Score: 0.0 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. X-Headers-End: 1ToAEq-0003u6-If Cc: spi-devel-general@lists.sourceforge.net, Gabor Juhos X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net Currently we are initializing the SPI controller in the chip select line function, and that function is called once for each SPI device on the bus. If a board has multiple SPI devices, the controller will be initialized multiple times. Introduce ath79_spi_{en,dis}able helper functions, and call those from probe/response in order to avoid the mutliple initialization of the controller. Signed-off-by: Gabor Juhos --- drivers/spi/spi-ath79.c | 41 ++++++++++++++++++++++++----------------- 1 file changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/spi/spi-ath79.c b/drivers/spi/spi-ath79.c index 19d539e..842acd8 100644 --- a/drivers/spi/spi-ath79.c +++ b/drivers/spi/spi-ath79.c @@ -96,16 +96,8 @@ static void ath79_spi_chipselect(struct spi_device *spi, int is_active) } -static int ath79_spi_setup_cs(struct spi_device *spi) +static void ath79_spi_enable(struct ath79_spi *sp) { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - struct ath79_spi_controller_data *cdata; - int status; - - cdata = spi->controller_data; - if (spi->chip_select && !cdata) - return -EINVAL; - /* enable GPIO mode */ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); @@ -115,6 +107,24 @@ static int ath79_spi_setup_cs(struct spi_device *spi) /* TODO: setup speed? */ ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, 0x43); +} + +static void ath79_spi_disable(struct ath79_spi *sp) +{ + /* restore CTRL register */ + ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); + /* disable GPIO mode */ + ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); +} + +static int ath79_spi_setup_cs(struct spi_device *spi) +{ + struct ath79_spi_controller_data *cdata; + int status; + + cdata = spi->controller_data; + if (spi->chip_select && !cdata) + return -EINVAL; status = 0; if (spi->chip_select) { @@ -135,17 +145,10 @@ static int ath79_spi_setup_cs(struct spi_device *spi) static void ath79_spi_cleanup_cs(struct spi_device *spi) { - struct ath79_spi *sp = ath79_spidev_to_sp(spi); - if (spi->chip_select) { struct ath79_spi_controller_data *cdata = spi->controller_data; gpio_free(cdata->gpio); } - - /* restore CTRL register */ - ath79_spi_wr(sp, AR71XX_SPI_REG_CTRL, sp->reg_ctrl); - /* disable GPIO mode */ - ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); } static int ath79_spi_setup(struct spi_device *spi) @@ -268,12 +271,15 @@ static int ath79_spi_probe(struct platform_device *pdev) dev_dbg(&pdev->dev, "register read/write delay is %u nsecs\n", sp->rrw_delay); + ath79_spi_enable(sp); ret = spi_bitbang_start(&sp->bitbang); if (ret) - goto err_clk_disable; + goto err_disable; return 0; +err_disable: + ath79_spi_disable(sp); err_clk_disable: clk_disable(sp->clk); err_clk_put: @@ -292,6 +298,7 @@ static int ath79_spi_remove(struct platform_device *pdev) struct ath79_spi *sp = platform_get_drvdata(pdev); spi_bitbang_stop(&sp->bitbang); + ath79_spi_disable(sp); clk_disable(sp->clk); clk_put(sp->clk); iounmap(sp->base);