From patchwork Fri Jan 4 18:47:15 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 1934261 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork2.kernel.org (Postfix) with ESMTP id C6CD7DFABD for ; Fri, 4 Jan 2013 18:47:53 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1TrCJ5-00007n-7C; Fri, 04 Jan 2013 18:47:51 +0000 Received: from sog-mx-1.v43.ch3.sourceforge.com ([172.29.43.191] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1TrCJ2-00007f-PK for spi-devel-general@lists.sourceforge.net; Fri, 04 Jan 2013 18:47:48 +0000 Received: from [216.228.121.35] (helo=hqemgate04.nvidia.com) by sog-mx-1.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1TrCJ0-0004B9-UL for spi-devel-general@lists.sourceforge.net; Fri, 04 Jan 2013 18:47:48 +0000 Received: from hqnvupgp07.nvidia.com (Not Verified[216.228.121.13]) by hqemgate04.nvidia.com id ; Fri, 04 Jan 2013 10:47:22 -0800 Received: from hqemhub02.nvidia.com ([172.17.108.22]) by hqnvupgp07.nvidia.com (PGP Universal service); Fri, 04 Jan 2013 10:43:32 -0800 X-PGP-Universal: processed; by hqnvupgp07.nvidia.com on Fri, 04 Jan 2013 10:43:32 -0800 Received: from hqnvemgw01.nvidia.com (172.20.150.20) by hqemhub02.nvidia.com (172.20.150.31) with Microsoft SMTP Server id 8.3.279.1; Fri, 4 Jan 2013 10:47:38 -0800 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw01.nvidia.com with MailMarshal (v6,7,2,8378) id ; Fri, 04 Jan 2013 10:48:15 -0800 Received: from ldewangan-ubuntu.nvidia.com ([10.19.65.30]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id r04IlYQ8007227; Fri, 4 Jan 2013 10:47:37 -0800 (PST) From: Laxman Dewangan To: Subject: [PATCH 2/2] spi: tegra: remove checks for valid speed Date: Sat, 5 Jan 2013 00:17:15 +0530 Message-ID: <1357325235-25485-2-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 1.7.1.1 In-Reply-To: <1357325235-25485-1-git-send-email-ldewangan@nvidia.com> References: <1357325235-25485-1-git-send-email-ldewangan@nvidia.com> MIME-Version: 1.0 X-Spam-Score: 1.0 (+) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -0.0 SPF_HELO_PASS SPF: HELO matches SPF record -0.0 SPF_PASS SPF: sender matches SPF record 1.0 RDNS_NONE Delivered to internal network by a host with no rDNS X-Headers-End: 1TrCJ0-0004B9-UL Cc: spi-devel-general@lists.sourceforge.net, Laxman Dewangan , swarren@nvidia.com, linux-kernel@vger.kernel.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces@lists.sourceforge.net SPI core make sure that all transfer has proper speed set before calling low level spi transfer. Hence, it is not require to have check in spi driver. Remove the check for speed validity from transfer and use it directly. Signed-off-by: Laxman Dewangan --- drivers/spi/spi-tegra20-sflash.c | 14 +++++++++++--- drivers/spi/spi-tegra20-slink.c | 6 +++--- 2 files changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-tegra20-sflash.c b/drivers/spi/spi-tegra20-sflash.c index 448a8cc..9a42c15 100644 --- a/drivers/spi/spi-tegra20-sflash.c +++ b/drivers/spi/spi-tegra20-sflash.c @@ -269,9 +269,7 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi, u32 speed; unsigned long command; - speed = t->speed_hz ? t->speed_hz : spi->max_speed_hz; - if (!speed) - speed = tsd->spi_max_frequency; + speed = t->speed_hz; if (speed != tsd->cur_speed) { clk_set_rate(tsd->clk, speed); tsd->cur_speed = speed; @@ -319,6 +317,15 @@ static int tegra_sflash_start_transfer_one(struct spi_device *spi, return tegra_sflash_start_cpu_based_transfer(tsd, t); } +static int tegra_sflash_setup(struct spi_device *spi) +{ + struct tegra_sflash_data *tsd = spi_master_get_devdata(spi->master); + + /* Set speed to the spi max fequency if spi device has not set */ + spi->max_speed_hz = spi->max_speed_hz ? : tsd->spi_max_frequency; + return 0; +} + static int tegra_sflash_transfer_one_message(struct spi_master *master, struct spi_message *msg) { @@ -492,6 +499,7 @@ static int tegra_sflash_probe(struct platform_device *pdev) /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA; + master->setup = tegra_sflash_setup; master->transfer_one_message = tegra_sflash_transfer_one_message; master->num_chipselect = MAX_CHIP_SELECT; master->bus_num = -1; diff --git a/drivers/spi/spi-tegra20-slink.c b/drivers/spi/spi-tegra20-slink.c index 651167f..29039f1 100644 --- a/drivers/spi/spi-tegra20-slink.c +++ b/drivers/spi/spi-tegra20-slink.c @@ -728,9 +728,7 @@ static int tegra_slink_start_transfer_one(struct spi_device *spi, unsigned long command2; bits_per_word = t->bits_per_word; - speed = t->speed_hz ? t->speed_hz : spi->max_speed_hz; - if (!speed) - speed = tspi->spi_max_frequency; + speed = t->speed_hz; if (speed != tspi->cur_speed) { clk_set_rate(tspi->clk, speed * 4); tspi->cur_speed = speed; @@ -841,6 +839,8 @@ static int tegra_slink_setup(struct spi_device *spi) BUG_ON(spi->chip_select >= MAX_CHIP_SELECT); + /* Set speed to the spi max fequency if spi device has not set */ + spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; ret = pm_runtime_get_sync(tspi->dev); if (ret < 0) { dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret);