From patchwork Wed Feb 27 00:39:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Wenyou Yang X-Patchwork-Id: 2190051 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork1.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork1.kernel.org (Postfix) with ESMTP id 7E7AD3FD4E for ; Wed, 27 Feb 2013 00:42:28 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-2.v29.ch3.sourceforge.com) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UAV6K-0002r0-4P; Wed, 27 Feb 2013 00:42:28 +0000 Received: from sog-mx-2.v43.ch3.sourceforge.com ([172.29.43.192] helo=mx.sourceforge.net) by sfs-ml-2.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UAV6I-0002qt-6x for spi-devel-general@lists.sourceforge.net; Wed, 27 Feb 2013 00:42:26 +0000 Received-SPF: pass (sog-mx-2.v43.ch3.sourceforge.com: domain of atmel.com designates 212.144.249.243 as permitted sender) client-ip=212.144.249.243; envelope-from=wenyou.yang@atmel.com; helo=eusmtp01.atmel.com; Received: from eusmtp01.atmel.com ([212.144.249.243]) by sog-mx-2.v43.ch3.sourceforge.com with esmtps (TLSv1:AES128-SHA:128) (Exim 4.76) id 1UAV6H-0000pl-8p for spi-devel-general@lists.sourceforge.net; Wed, 27 Feb 2013 00:42:26 +0000 Received: from apsmtp01.atmel.com (10.168.254.31) by eusmtp01.atmel.com (10.161.101.31) with Microsoft SMTP Server id 14.2.318.4; Wed, 27 Feb 2013 01:42:42 +0100 Received: from shaarm01.corp.atmel.com (10.168.254.13) by apsmtp01.atmel.com (10.168.254.31) with Microsoft SMTP Server id 14.2.318.1; Wed, 27 Feb 2013 08:49:42 +0800 From: Wenyou Yang To: Subject: [PATCH Resend v5 03/16] spi/spi-atmel: add support transfer on CS1, 2, 3, not only on CS0 Date: Wed, 27 Feb 2013 08:39:34 +0800 Message-ID: <1361925574-12023-1-git-send-email-wenyou.yang@atmel.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1361925297-11854-1-git-send-email-wenyou.yang@atmel.com> References: <1361925297-11854-1-git-send-email-wenyou.yang@atmel.com> MIME-Version: 1.0 X-Spam-Score: -2.2 (--) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record -0.7 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain X-Headers-End: 1UAV6H-0000pl-8p Cc: richard.genoud@gmail.com, JM.Lin@atmel.com, nicolas.ferre@atmel.com, linux-kernel@vger.kernel.org, wenyou.yang@atmel.com, spi-devel-general@lists.sourceforge.net, plagnioj@jcrosoft.com X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces@lists.sourceforge.net Signed-off-by: Wenyou Yang Cc: spi-devel-general@lists.sourceforge.net Cc: linux-kernel@vger.kernel.org --- drivers/spi/spi-atmel.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index a8e091b..9c8f2d5 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -256,11 +256,6 @@ static bool atmel_spi_is_v2(struct atmel_spi *as) * Master on Chip Select 0.") No workaround exists for that ... so for * nCS0 on that chip, we (a) don't use the GPIO, (b) can't support CS_HIGH, * and (c) will trigger that first erratum in some cases. - * - * TODO: Test if the atmel_spi_is_v2() branch below works on - * AT91RM9200 if we use some other register than CSR0. However, don't - * do this unconditionally since AP7000 has an errata where the BITS - * field in CSR0 overrides all other CSRs. */ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) @@ -270,18 +265,22 @@ static void cs_activate(struct atmel_spi *as, struct spi_device *spi) u32 mr; if (atmel_spi_is_v2(as)) { - /* - * Always use CSR0. This ensures that the clock - * switches to the correct idle polarity before we - * toggle the CS. + spi_writel(as, CSR0 + 4 * spi->chip_select, asd->csr); + /* For the low SPI version, there is a issue that PDC transfer + * on CS1,2,3 needs SPI_CSR0.BITS config as SPI_CSR1,2,3.BITS */ spi_writel(as, CSR0, asd->csr); if (as->caps.has_wdrbt) { - spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(WDRBT) - | SPI_BIT(MODFDIS) | SPI_BIT(MSTR)); + spi_writel(as, MR, + SPI_BF(PCS, ~(0x01 << spi->chip_select)) + | SPI_BIT(WDRBT) + | SPI_BIT(MODFDIS) + | SPI_BIT(MSTR)); } else { - spi_writel(as, MR, SPI_BF(PCS, 0x0e) | SPI_BIT(MODFDIS) - | SPI_BIT(MSTR)); + spi_writel(as, MR, + SPI_BF(PCS, ~(0x01 << spi->chip_select)) + | SPI_BIT(MODFDIS) + | SPI_BIT(MSTR)); } mr = spi_readl(as, MR); gpio_set_value(asd->npcs_pin, active);