From patchwork Wed Mar 20 10:46:56 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manjunathappa, Prakash" X-Patchwork-Id: 2306511 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork2.kernel.org (Postfix) with ESMTP id 1713DDF24C for ; Wed, 20 Mar 2013 10:47:20 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UIGYB-0008P0-N0; Wed, 20 Mar 2013 10:47:19 +0000 Received: from sog-mx-3.v43.ch3.sourceforge.com ([172.29.43.193] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UIGYA-0008Ok-9b for spi-devel-general@lists.sourceforge.net; Wed, 20 Mar 2013 10:47:18 +0000 Received-SPF: pass (sog-mx-3.v43.ch3.sourceforge.com: domain of ti.com designates 192.94.94.41 as permitted sender) client-ip=192.94.94.41; envelope-from=prakash.pm@ti.com; helo=bear.ext.ti.com; Received: from bear.ext.ti.com ([192.94.94.41]) by sog-mx-3.v43.ch3.sourceforge.com with esmtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1UIGY6-00020F-RR for spi-devel-general@lists.sourceforge.net; Wed, 20 Mar 2013 10:47:18 +0000 Received: from dbdp20.itg.ti.com ([172.24.170.38]) by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id r2KAkst9009489; Wed, 20 Mar 2013 05:46:54 -0500 Received: from DBDE71.ent.ti.com (localhost [127.0.0.1]) by dbdp20.itg.ti.com (8.13.8/8.13.8) with ESMTP id r2KAkq5c010743; Wed, 20 Mar 2013 16:16:52 +0530 (IST) Received: from dbdp32.itg.ti.com (172.24.170.251) by DBDE71.ent.ti.com (172.24.170.149) with Microsoft SMTP Server id 14.1.323.3; Wed, 20 Mar 2013 16:16:51 +0530 Received: from ucmsshproxy.india.ext.ti.com (dbdp20.itg.ti.com [172.24.170.38]) by dbdp32.itg.ti.com (8.13.8/8.13.8) with SMTP id r2KAkpTY019554; Wed, 20 Mar 2013 16:16:51 +0530 Received: from symphony.india.ext.ti.com (unknown [192.168.247.13]) by ucmsshproxy.india.ext.ti.com (Postfix) with ESMTP id 44E42158002; Wed, 20 Mar 2013 16:16:51 +0530 (IST) Received: from ubuntu-psp-linux.india.ext.ti.com (ubuntu-psp-linux [192.168.247.46]) by symphony.india.ext.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id r2KAkoR24175; Wed, 20 Mar 2013 16:16:50 +0530 (IST) From: "Manjunathappa, Prakash" To: , Subject: [PATCH v4 2/5] spi/davinci: add DT binding documentation Date: Wed, 20 Mar 2013 16:16:56 +0530 Message-ID: <1363776419-10563-3-git-send-email-prakash.pm@ti.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1363776419-10563-1-git-send-email-prakash.pm@ti.com> References: <1363776419-10563-1-git-send-email-prakash.pm@ti.com> MIME-Version: 1.0 X-Spam-Score: -4.0 (----) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain -0.0 SPF_PASS SPF: sender matches SPF record -2.5 RP_MATCHES_RCVD Envelope sender domain matches handover relay domain X-Headers-End: 1UIGY6-00020F-RR Cc: linux@arm.linux.org.uk, linux-doc@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, nsekhar@ti.com, rob.herring@calxeda.com, "Manjunathappa, Prakash" , Murali Karicheri , rob@landley.net, hs@denx.de, linux-arm-kernel@lists.infradead.org X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces@lists.sourceforge.net From: Murali Karicheri Add binding documentation for spi-davinci module. [prakash.pm@ti.com: Follow DT naming convention for compatible property] Signed-off-by: Murali Karicheri Reviewed-by: Grant Likely Reviewed-by: Sekhar Nori Signed-off-by: Manjunathappa, Prakash --- Since v3: Changed the commit message and fixed alignment issues. .../devicetree/bindings/spi/spi-davinci.txt | 51 ++++++++++++++++++++ 1 files changed, 51 insertions(+), 0 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/spi-davinci.txt diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt new file mode 100644 index 0000000..6d0ac8d --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt @@ -0,0 +1,51 @@ +Davinci SPI controller device bindings + +Required properties: +- #address-cells: number of cells required to define a chip select + address on the SPI bus. Should be set to 1. +- #size-cells: should be zero. +- compatible: + - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family + - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family +- reg: Offset and length of SPI controller register space +- num-cs: Number of chip selects +- ti,davinci-spi-intr-line: interrupt line used to connect the SPI + IP to the interrupt controller within the SoC. Possible values + are 0 and 1. Manual says one of the two possible interrupt + lines can be tied to the interrupt controller. Set this + based on a specifc SoC configuration. +- interrupts: interrupt number mapped to CPU. +- clocks: spi clk phandle + +Example of a NOR flash slave device (n25q032) connected to DaVinci +SPI controller device over the SPI bus. + +spi0:spi@20BF0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "ti,dm6446-spi"; + reg = <0x20BF0000 0x1000>; + num-cs = <4>; + ti,davinci-spi-intr-line = <0>; + interrupts = <338>; + clocks = <&clkspi>; + + flash: n25q032@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "st,m25p32"; + spi-max-frequency = <25000000>; + reg = <0>; + + partition@0 { + label = "u-boot-spl"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@1 { + label = "test"; + reg = <0x80000 0x380000>; + }; + }; +};