From patchwork Mon Apr 22 10:01:17 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 2471261 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork2.kernel.org (Postfix) with ESMTP id 4C83ADF23A for ; Mon, 22 Apr 2013 10:28:35 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-1.v29.ch3.sourceforge.com) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UUDz8-0006zd-Ky; Mon, 22 Apr 2013 10:28:34 +0000 Received: from sog-mx-4.v43.ch3.sourceforge.com ([172.29.43.194] helo=mx.sourceforge.net) by sfs-ml-1.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UUDz7-0006zP-D7 for spi-devel-general@lists.sourceforge.net; Mon, 22 Apr 2013 10:28:33 +0000 X-ACL-Warn: Received: from eu1sys200aog108.obsmtp.com ([207.126.144.125]) by sog-mx-4.v43.ch3.sourceforge.com with smtps (TLSv1:AES256-SHA:256) (Exim 4.76) id 1UUDz5-00076F-NW for spi-devel-general@lists.sourceforge.net; Mon, 22 Apr 2013 10:28:33 +0000 Received: from beta.dmz-eu.st.com ([164.129.1.35]) (using TLSv1) by eu1sys200aob108.postini.com ([207.126.147.11]) with SMTP ID DSNKUXUQxyiEmAA1tI9iUc9VSyAiY1IgQQRp@postini.com; Mon, 22 Apr 2013 10:28:31 UTC Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 843321ED; Mon, 22 Apr 2013 10:01:21 +0000 (GMT) Received: from relay1.stm.gmessaging.net (unknown [10.230.100.17]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C706F48DF; Mon, 22 Apr 2013 10:01:15 +0000 (GMT) Received: from exdcvycastm003.EQ1STM.local (alteon-source-exch [10.230.100.61]) (using TLSv1 with cipher RC4-MD5 (128/128 bits)) (Client CN "exdcvycastm003", Issuer "exdcvycastm003" (not verified)) by relay1.stm.gmessaging.net (Postfix) with ESMTPS id C228424C07C; Mon, 22 Apr 2013 12:01:15 +0200 (CEST) Received: from steludxu4075.lud.stericsson.com (10.230.100.153) by smtp.stericsson.com (10.230.100.1) with Microsoft SMTP Server (TLS) id 8.3.279.5; Mon, 22 Apr 2013 12:01:20 +0200 From: Linus Walleij To: , Mark Brown , Grant Likely , Subject: [PATCH 20/23] ARM: u300: add SPI PL022 to the device tree Date: Mon, 22 Apr 2013 12:01:17 +0200 Message-ID: <1366624877-6932-1-git-send-email-linus.walleij@stericsson.com> X-Mailer: git-send-email 1.7.11.3 MIME-Version: 1.0 X-Spam-Score: 0.0 (/) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. X-Headers-End: 1UUDz5-00076F-NW Cc: devicetree-discuss@lists.ozlabs.org, Linus Walleij , Arnd Bergmann X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces@lists.sourceforge.net From: Linus Walleij This registers the PL022 PrimeCell from the U300 device tree. We make a new copy of the platform data for the device tree boot path, as the old platform data is in an older file which will be going away. Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-u300.dts | 7 +++++++ arch/arm/mach-u300/core.c | 19 +++++++++++++++++++ 2 files changed, 26 insertions(+) diff --git a/arch/arm/boot/dts/ste-u300.dts b/arch/arm/boot/dts/ste-u300.dts index cdffeb9..979d96c 100644 --- a/arch/arm/boot/dts/ste-u300.dts +++ b/arch/arm/boot/dts/ste-u300.dts @@ -214,5 +214,12 @@ cd-inverted; vmmc-supply = <&ab3100_ldo_g_reg>; }; + + spi: ssp@c0006000 { + compatible = "arm,pl022", "arm,primecell"; + reg = <0xc0006000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <23>; + }; }; }; diff --git a/arch/arm/mach-u300/core.c b/arch/arm/mach-u300/core.c index 98d4dbe..9467ffe 100644 --- a/arch/arm/mach-u300/core.c +++ b/arch/arm/mach-u300/core.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include @@ -703,6 +704,22 @@ MACHINE_END #ifdef CONFIG_OF +static struct pl022_ssp_controller spi_plat_data = { + /* If you have several SPI buses this varies, we have only bus 0 */ + .bus_id = 0, + /* + * On the APP CPU GPIO 4, 5 and 6 are connected as generic + * chip selects for SPI. (Same on U330, U335 and U365.) + * TODO: make sure the GPIO driver can select these properly + * and do padmuxing accordingly too. + */ + .num_chipselect = 3, + .enable_dma = 1, + .dma_filter = coh901318_filter_id, + .dma_rx_param = (void *) U300_DMA_SPI_RX, + .dma_tx_param = (void *) U300_DMA_SPI_TX, +}; + /* These are mostly to get the right device names for the clock lookups */ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("stericsson,pinctrl-u300", U300_SYSCON_BASE, @@ -719,6 +736,8 @@ static struct of_dev_auxdata u300_auxdata_lookup[] __initdata = { "uart0", &uart0_plat_data), OF_DEV_AUXDATA("arm,primecell", U300_UART1_BASE, "uart1", &uart1_plat_data), + OF_DEV_AUXDATA("arm,primecell", U300_SPI_BASE, + "pl022", &spi_plat_data), OF_DEV_AUXDATA("st,ddci2c", U300_I2C0_BASE, "stu300.0", NULL), OF_DEV_AUXDATA("st,ddci2c", U300_I2C1_BASE,