From patchwork Mon May 20 06:51:34 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: girishks2000@gmail.com X-Patchwork-Id: 2590971 Return-Path: X-Original-To: patchwork-spi-devel-general@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from lists.sourceforge.net (lists.sourceforge.net [216.34.181.88]) by patchwork2.kernel.org (Postfix) with ESMTP id C745BDF2A2 for ; Mon, 20 May 2013 06:52:09 +0000 (UTC) Received: from localhost ([127.0.0.1] helo=sfs-ml-4.v29.ch3.sourceforge.com) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UeJx3-0006J7-Ei; Mon, 20 May 2013 06:52:09 +0000 Received: from sog-mx-2.v43.ch3.sourceforge.com ([172.29.43.192] helo=mx.sourceforge.net) by sfs-ml-4.v29.ch3.sourceforge.com with esmtp (Exim 4.76) (envelope-from ) id 1UeJx1-0006Ix-Kw for spi-devel-general@lists.sourceforge.net; Mon, 20 May 2013 06:52:07 +0000 Received-SPF: pass (sog-mx-2.v43.ch3.sourceforge.com: domain of gmail.com designates 209.85.210.52 as permitted sender) client-ip=209.85.210.52; envelope-from=girishks2000@gmail.com; helo=mail-da0-f52.google.com; Received: from mail-da0-f52.google.com ([209.85.210.52]) by sog-mx-2.v43.ch3.sourceforge.com with esmtps (TLSv1:RC4-SHA:128) (Exim 4.76) id 1UeJx0-0003b5-Rx for spi-devel-general@lists.sourceforge.net; Mon, 20 May 2013 06:52:07 +0000 Received: by mail-da0-f52.google.com with SMTP id o9so3702249dan.11 for ; Sun, 19 May 2013 23:52:01 -0700 (PDT) X-Received: by 10.68.222.74 with SMTP id qk10mr48143677pbc.58.1369032721024; Sun, 19 May 2013 23:52:01 -0700 (PDT) Received: from localhost.localdomain ([115.113.119.130]) by mx.google.com with ESMTPSA id nt2sm22842887pbc.17.2013.05.19.23.51.57 for (version=TLSv1 cipher=ECDHE-RSA-RC4-SHA bits=128/128); Sun, 19 May 2013 23:52:00 -0700 (PDT) From: Girish K S To: spi-devel-general@lists.sourceforge.net, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 3/3] spi: s3c64xx: Added support for exynos5440 spi Date: Mon, 20 May 2013 12:21:34 +0530 Message-Id: <1369032694-13183-4-git-send-email-ks.giri@samsung.com> X-Mailer: git-send-email 1.7.5.4 In-Reply-To: <1369032694-13183-1-git-send-email-ks.giri@samsung.com> References: <1369032694-13183-1-git-send-email-ks.giri@samsung.com> X-Spam-Score: -1.4 (-) X-Spam-Report: Spam Filtering performed by mx.sourceforge.net. See http://spamassassin.org/tag/ for more details. -1.5 SPF_CHECK_PASS SPF reports sender host as permitted sender for sender-domain 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (girishks2000[at]gmail.com) -0.0 SPF_PASS SPF: sender matches SPF record 0.2 FREEMAIL_ENVFROM_END_DIGIT Envelope-from freemail username ends in digit (girishks2000[at]gmail.com) -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-Headers-End: 1UeJx0-0003b5-Rx Cc: broonie@opensource.wolfsonmicro.com, Girish K S X-BeenThere: spi-devel-general@lists.sourceforge.net X-Mailman-Version: 2.1.9 Precedence: list List-Id: Linux SPI core/device drivers discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: spi-devel-general-bounces@lists.sourceforge.net From: Girish K S This patch adds support for the exynos5440 spi controller. The integration of the spi IP in exynos5440 is different from other SoC's. The I/O pins are no more configured via gpio, they have dedicated pins. Signed-off-by: Girish K S --- drivers/spi/spi-s3c64xx.c | 12 ++++++++++++ 1 files changed, 12 insertions(+), 0 deletions(-) diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index eaf9e1c..bd43888 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1608,6 +1608,15 @@ static struct s3c64xx_spi_port_config exynos4_spi_port_config = { .clk_from_cmu = true, }; +static struct s3c64xx_spi_port_config exynos5440_spi_port_config = { + .fifo_lvl_mask = { 0x1ff }, + .rx_lvl_offset = 15, + .tx_st_done = 25, + .high_speed = true, + .clk_from_cmu = true, + .quirks = S3C64XX_SPI_QUIRK_POLL, +}; + static struct platform_device_id s3c64xx_spi_driver_ids[] = { { .name = "s3c2443-spi", @@ -1636,6 +1645,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = { { .compatible = "samsung,exynos4210-spi", .data = (void *)&exynos4_spi_port_config, }, + { .compatible = "samsung,exynos5440-spi", + .data = (void *)&exynos5440_spi_port_config, + }, { }, }; MODULE_DEVICE_TABLE(of, s3c64xx_spi_dt_match);