Message ID | 1392040096.4191.1.camel@phoenix (mailing list archive) |
---|---|
State | Accepted |
Commit | 383840d92f8e5e4c3ab4090e5d8f2ca5cf893802 |
Headers | show |
On 02/10/2014 06:48 AM, Axel Lin wrote: > Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will > handle checking transfer speed. > > In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of > spi_device default to max_speed_hz of controller', > spi core will also set default spi->max_speed_hz if it is not set. > So remove the duplicate code in tegra_spi_setup. The series, Acked-by: Stephen Warren <swarren@nvidia.com> I wonder ... > diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c > @@ -1049,8 +1035,9 @@ static int tegra_spi_probe(struct platform_device *pdev) > - /* Parse DT */ > - tegra_spi_parse_dt(pdev, tspi); > + if (of_property_read_u32(pdev->dev.of_node, "spi-max-frequency", > + &master->max_speed_hz)) > + master->max_speed_hz = 25000000; /* 25MHz */ ... if that DT parsing can be done in common code too? -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Feb 10, 2014 at 09:53:03AM -0700, Stephen Warren wrote: > On 02/10/2014 06:48 AM, Axel Lin wrote: > I wonder ... > > + if (of_property_read_u32(pdev->dev.of_node, "spi-max-frequency", > > + &master->max_speed_hz)) > > + master->max_speed_hz = 25000000; /* 25MHz */ > ... if that DT parsing can be done in common code too? Yes, there is in general a lot of opportunity in the SPI subsystem to factor code out into the core. The DT stuff (things like this and also GPIO chip selects) is part of it.
On Mon, Feb 10, 2014 at 09:48:16PM +0800, Axel Lin wrote: > Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will > handle checking transfer speed. Applied all, thanks.
diff --git a/drivers/spi/spi-tegra114.c b/drivers/spi/spi-tegra114.c index 0930d60..2f8aba5 100644 --- a/drivers/spi/spi-tegra114.c +++ b/drivers/spi/spi-tegra114.c @@ -171,7 +171,6 @@ struct tegra_spi_data { void __iomem *base; phys_addr_t phys; unsigned irq; - u32 spi_max_frequency; u32 cur_speed; struct spi_device *cur_spi; @@ -762,9 +761,6 @@ static int tegra_spi_setup(struct spi_device *spi) BUG_ON(spi->chip_select >= MAX_CHIP_SELECT); - /* Set speed to the spi max fequency if spi device has not set */ - spi->max_speed_hz = spi->max_speed_hz ? : tspi->spi_max_frequency; - ret = pm_runtime_get_sync(tspi->dev); if (ret < 0) { dev_err(tspi->dev, "pm runtime failed, e = %d\n", ret); @@ -1018,16 +1014,6 @@ static irqreturn_t tegra_spi_isr(int irq, void *context_data) return IRQ_WAKE_THREAD; } -static void tegra_spi_parse_dt(struct platform_device *pdev, - struct tegra_spi_data *tspi) -{ - struct device_node *np = pdev->dev.of_node; - - if (of_property_read_u32(np, "spi-max-frequency", - &tspi->spi_max_frequency)) - tspi->spi_max_frequency = 25000000; /* 25MHz */ -} - static struct of_device_id tegra_spi_of_match[] = { { .compatible = "nvidia,tegra114-spi", }, {} @@ -1049,8 +1035,9 @@ static int tegra_spi_probe(struct platform_device *pdev) platform_set_drvdata(pdev, master); tspi = spi_master_get_devdata(master); - /* Parse DT */ - tegra_spi_parse_dt(pdev, tspi); + if (of_property_read_u32(pdev->dev.of_node, "spi-max-frequency", + &master->max_speed_hz)) + master->max_speed_hz = 25000000; /* 25MHz */ /* the spi->mode bits understood by this driver: */ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
Use master->max_speed_hz instead of tspi->spi_max_frequency, so spi core will handle checking transfer speed. In additional, since commit 052eb2d49006 'spi: core: Set max_speed_hz of spi_device default to max_speed_hz of controller', spi core will also set default spi->max_speed_hz if it is not set. So remove the duplicate code in tegra_spi_setup. Signed-off-by: Axel Lin <axel.lin@ingics.com> --- drivers/spi/spi-tegra114.c | 19 +++---------------- 1 file changed, 3 insertions(+), 16 deletions(-)