From patchwork Thu Apr 3 11:10:31 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Harini Katakam X-Patchwork-Id: 3932441 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id F12B59F38C for ; Thu, 3 Apr 2014 11:11:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 1A3192024D for ; Thu, 3 Apr 2014 11:11:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2AA9A20225 for ; Thu, 3 Apr 2014 11:11:19 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751690AbaDCLLE (ORCPT ); Thu, 3 Apr 2014 07:11:04 -0400 Received: from mail-qc0-f179.google.com ([209.85.216.179]:47415 "EHLO mail-qc0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751716AbaDCLKm (ORCPT ); Thu, 3 Apr 2014 07:10:42 -0400 Received: by mail-qc0-f179.google.com with SMTP id m20so1634123qcx.24 for ; Thu, 03 Apr 2014 04:10:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=H9MwiSB1QthJt53C/oqbhiFYlKGpw0oLaVa1bAuylgY=; b=ABFdv0xqss2p0lO4OZWL20MTKwoxKtfPVARk9S6AK81rCTEC1Tw6kuG+1LjJeHDcgy hnAT7lf33z1pAuwiY2fjktMKiOGmsKsyhd+nX7M7gWamEkRhnS86MCJFRq1t0aEOZJqS JeWnN3Tv8odYD+OiXHN5v2kHSCMm6qwnBdDnlVxe1wmv5CdekXqO72XgA5xg3+OLEPQ7 7R03GJZRwC5NwXWfq9RbxDWsnNpYhYf7+5Um9EGPC6o2JEODoqM7Su2BcRaqL8arH7Ff De2t+PyaTYjWvgMWO2JnUvlD7ItyCi1IEiXe1knAv7S8L+8d8W6Owf5z2du7ZudtFqk0 LJCg== X-Received: by 10.224.86.67 with SMTP id r3mr6704617qal.9.1396523442102; Thu, 03 Apr 2014 04:10:42 -0700 (PDT) Received: from localhost ([149.199.62.254]) by mx.google.com with ESMTPSA id o16sm9479882qax.30.2014.04.03.04.10.40 for (version=TLSv1.2 cipher=RC4-SHA bits=128/128); Thu, 03 Apr 2014 04:10:41 -0700 (PDT) From: Harini Katakam To: broonie@kernel.org, grant.likely@linaro.org, robh+dt@kernel.org, pawel.moll@arm.com, mark.rutland@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-doc@vger.kernel.org Cc: Harini Katakam Subject: [PATCH v2 2/2] devicetree: Add devicetree bindings documentation for Cadence SPI Date: Thu, 3 Apr 2014 16:40:31 +0530 Message-Id: <1396523431-14519-2-git-send-email-harinik@xilinx.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1396523431-14519-1-git-send-email-harinik@xilinx.com> References: <1396523431-14519-1-git-send-email-harinik@xilinx.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add spi-cadence bindings documentation. Signed-off-by: Harini Katakam --- v2 changes: - Separate patch for bindings. - Add xilinx compatible string; Make compatible string first in the node. - Use property name num-cs. Make this property optional. --- .../devicetree/bindings/spi/spi-cadence.txt | 27 ++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-cadence.txt diff --git a/Documentation/devicetree/bindings/spi/spi-cadence.txt b/Documentation/devicetree/bindings/spi/spi-cadence.txt new file mode 100644 index 0000000..ccb7599 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-cadence.txt @@ -0,0 +1,27 @@ +Cadence SPI controller Device Tree Bindings +------------------------------------------- + +Required properties: +- compatible : Should be "cdns,spi-r1p6" or "xlnx,zynq-spi-r1p6". +- reg : Physical base address and size of SPI registers map. +- interrupts : Property with a value describing the interrupt + number. +- interrupt-parent : Must be core interrupt controller +- clock-names : List of input clock names - "ref_clk", "pclk" + (See clock bindings for details). +- clocks : Clock phandles (see clock bindings for details). + +Optional properties: +- num-cs : Number of chip selects used. + +Example: + + spi@e0007000 { + compatible = "xlnx,zynq-spi-r1p6"; + clock-names = "ref_clk", "pclk"; + clocks = <&clkc 26>, <&clkc 35>; + interrupt-parent = <&intc>; + interrupts = <0 49 4>; + num-cs = /bits/ 16 <4>; + reg = <0xe0007000 0x1000>; + } ;