From patchwork Fri Jun 20 10:20:38 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Geert Uytterhoeven X-Patchwork-Id: 4388051 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 32AFDBEECB for ; Fri, 20 Jun 2014 10:20:48 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 71700203B7 for ; Fri, 20 Jun 2014 10:20:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 97416203C4 for ; Fri, 20 Jun 2014 10:20:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S965546AbaFTKUo (ORCPT ); Fri, 20 Jun 2014 06:20:44 -0400 Received: from albert.telenet-ops.be ([195.130.137.90]:44314 "EHLO albert.telenet-ops.be" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966220AbaFTKUn (ORCPT ); Fri, 20 Jun 2014 06:20:43 -0400 Received: from ayla.of.borg ([84.193.72.141]) by albert.telenet-ops.be with bizsmtp id GaLi1o00132ts5g06aLizM; Fri, 20 Jun 2014 12:20:42 +0200 Received: from geert by ayla.of.borg with local (Exim 4.76) (envelope-from ) id 1Wxvw1-0003ao-Ry; Fri, 20 Jun 2014 12:20:41 +0200 From: Geert Uytterhoeven To: Simon Horman , Magnus Damm Cc: Ben Dooks , Mark Brown , linux-spi@vger.kernel.org, devicetree@vger.kernel.org, linux-sh@vger.kernel.org, Geert Uytterhoeven Subject: [PATCH/RFC 2/2] ARM: shmobile: r8a7791 dtsi: Enable DMA for MSIOF Date: Fri, 20 Jun 2014 12:20:38 +0200 Message-Id: <1403259638-13774-3-git-send-email-geert+renesas@glider.be> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1403259638-13774-1-git-send-email-geert+renesas@glider.be> References: <1403259638-13774-1-git-send-email-geert+renesas@glider.be> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add register sets used for access by the DMA engine, and DMA properties to the MSIOF nodes. Signed-off-by: Geert Uytterhoeven --- The format of the DMA specifiers depends on the DT bindings for SHDMA, which are still under development. This patch has been sent before as part of the series "[PATCH/RFC 0/7] ARM: shmobile: r8a7791: Add preliminary DMA support". Changes: - Add register sets for DMA, - Reorder: TX first, RX second. arch/arm/boot/dts/r8a7791.dtsi | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 98fdd88462e2..1f8a4605e1e3 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -1005,9 +1005,12 @@ msiof0: spi@e6e20000 { compatible = "renesas,msiof-r8a7791"; - reg = <0 0xe6e20000 0 0x0064>; + reg = <0 0xe6e20000 0 0x0064>, <0 0xe7e20000 0 0x0064>; interrupts = <0 156 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp0_clks R8A7791_CLK_MSIOF0>; + dmas = <&dma0 R8A7791_DMA_MSIOF0_TX CHCR_TX_32BIT>, + <&dma0 R8A7791_DMA_MSIOF0_RX CHCR_RX_32BIT>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1015,9 +1018,12 @@ msiof1: spi@e6e10000 { compatible = "renesas,msiof-r8a7791"; - reg = <0 0xe6e10000 0 0x0064>; + reg = <0 0xe6e10000 0 0x0064>, <0 0xe7e10000 0 0x0064>; interrupts = <0 157 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7791_CLK_MSIOF1>; + dmas = <&dma0 R8A7791_DMA_MSIOF1_TX CHCR_TX_32BIT>, + <&dma0 R8A7791_DMA_MSIOF1_RX CHCR_RX_32BIT>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled"; @@ -1025,9 +1031,12 @@ msiof2: spi@e6e00000 { compatible = "renesas,msiof-r8a7791"; - reg = <0 0xe6e00000 0 0x0064>; + reg = <0 0xe6e00000 0 0x0064>, <0 0xe7e00000 0 0x0064>; interrupts = <0 158 IRQ_TYPE_LEVEL_HIGH>; clocks = <&mstp2_clks R8A7791_CLK_MSIOF2>; + dmas = <&dma0 R8A7791_DMA_MSIOF2_TX CHCR_TX_32BIT>, + <&dma0 R8A7791_DMA_MSIOF2_RX CHCR_RX_32BIT>; + dma-names = "tx", "rx"; #address-cells = <1>; #size-cells = <0>; status = "disabled";