From patchwork Fri Sep 12 12:11:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 4894301 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id BAFD89F537 for ; Fri, 12 Sep 2014 12:09:38 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3331B202F0 for ; Fri, 12 Sep 2014 12:14:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A7B5C202E9 for ; Fri, 12 Sep 2014 12:14:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754374AbaILMOb (ORCPT ); Fri, 12 Sep 2014 08:14:31 -0400 Received: from mga02.intel.com ([134.134.136.20]:32609 "EHLO mga02.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754315AbaILMOa (ORCPT ); Fri, 12 Sep 2014 08:14:30 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga101.jf.intel.com with ESMTP; 12 Sep 2014 05:14:12 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,512,1406617200"; d="scan'208";a="601966651" Received: from smile.fi.intel.com (HELO smile) ([10.237.72.168]) by orsmga002.jf.intel.com with ESMTP; 12 Sep 2014 05:14:10 -0700 Received: from andy by smile with local (Exim 4.84) (envelope-from ) id 1XSPhq-0004Mz-KH; Fri, 12 Sep 2014 15:12:02 +0300 From: Andy Shevchenko To: Feng Tang , Mark Brown , linux-spi@vger.kernel.org Cc: Andy Shevchenko Subject: [PATCH v1 4/6] spi: dw-mid: remove Moorestown support Date: Fri, 12 Sep 2014 15:11:59 +0300 Message-Id: <1410523921-16732-5-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1410523921-16732-1-git-send-email-andriy.shevchenko@linux.intel.com> References: <1410523921-16732-1-git-send-email-andriy.shevchenko@linux.intel.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-9.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The support of the Moorestown was removed [1] from kernel long time ago. This is just a follow up of that change. [1] http://www.spinics.net/lists/platform-driver-x86/msg02948.html Signed-off-by: Andy Shevchenko --- drivers/spi/Kconfig | 2 +- drivers/spi/spi-dw-mid.c | 8 +++----- 2 files changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 149d6f3..dc10453 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -600,7 +600,7 @@ config SPI_DW_PCI depends on SPI_DESIGNWARE && PCI config SPI_DW_MID_DMA - bool "DMA support for DW SPI controller on Intel Moorestown platform" + bool "DMA support for DW SPI controller on Intel MID platform" depends on SPI_DW_PCI && INTEL_MID_DMAC config SPI_DW_MMIO diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index 0d88e4a..deba3c4 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -50,11 +50,9 @@ static int mid_spi_dma_init(struct dw_spi *dws) /* * Get pci device for DMA controller, currently it could only - * be the DMA controller of either Moorestown or Medfield + * be the DMA controller of Medfield */ - dws->dmac = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0813, NULL); - if (!dws->dmac) - dws->dmac = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0827, NULL); + dws->dmac = pci_get_device(PCI_VENDOR_ID_INTEL, 0x0827, NULL); dma_cap_zero(mask); dma_cap_set(DMA_SLAVE, mask); @@ -192,7 +190,7 @@ static struct dw_spi_dma_ops mid_dma_ops = { }; #endif -/* Some specific info for SPI0 controller on Moorestown */ +/* Some specific info for SPI0 controller on Intel MID */ /* HW info for MRST CLk Control Unit, one 32b reg */ #define MRST_SPI_CLK_BASE 100000000 /* 100m */