From patchwork Sun Nov 9 09:25:11 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Beniamino Galvani X-Patchwork-Id: 5260111 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 20677C11AC for ; Sun, 9 Nov 2014 09:29:16 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 4C9D7200E1 for ; Sun, 9 Nov 2014 09:29:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7C9FC200DB for ; Sun, 9 Nov 2014 09:29:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751837AbaKIJ2w (ORCPT ); Sun, 9 Nov 2014 04:28:52 -0500 Received: from mail-wg0-f48.google.com ([74.125.82.48]:40723 "EHLO mail-wg0-f48.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751622AbaKIJ1s (ORCPT ); Sun, 9 Nov 2014 04:27:48 -0500 Received: by mail-wg0-f48.google.com with SMTP id m15so6778421wgh.7 for ; Sun, 09 Nov 2014 01:27:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=lWYGx985s72XmLqPPjJALD3Wp6Wj/3+CcdsCwOBMyQY=; b=f0J8CtOS//6lKNeQVsrC1Xf/L3hjZYO9RhXM1goTQMR2mJlvkMm81sQQ+YsqKvBHu7 qpmNHpRb0Y3ka4CvIVJN/UG0xuKk1fTwZGLShBCYkp/FyFwpV1Sf3R2KEXZr6hyoFx3p 3xHatdbtxA1K8qT1A6B0sSCVGxvBQNmaZ0Ftb6a+Pcq9bvpGfASZRnJEZgQFk8b70fQ0 rQ7BwlQAAULK6pKd5KdXJQyaV0FNSOTVVnQ0yT6WWn3lMUVm8xdiKZB2kJV/DowRr3Xw 0JFBd8VP5BijzT+GPHdQuSb4kC5aYyt+Xuosc8CQby7BS3Npn5OFkxBlmMdlAaqgC6N6 JnJw== X-Received: by 10.194.239.164 with SMTP id vt4mr2047811wjc.131.1415525264449; Sun, 09 Nov 2014 01:27:44 -0800 (PST) Received: from sark.local (host115-93-dynamic.40-79-r.retail.telecomitalia.it. [79.40.93.115]) by mx.google.com with ESMTPSA id cu9sm18496705wjb.0.2014.11.09.01.27.41 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 09 Nov 2014 01:27:43 -0800 (PST) From: Beniamino Galvani To: Mark Brown Cc: linux-spi@vger.kernel.org, Carlo Caione , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , Jerry Cao , Victor Wan , Beniamino Galvani Subject: [PATCH 1/3] spi: meson: Add device tree bindings documentation for SPIFC Date: Sun, 9 Nov 2014 10:25:11 +0100 Message-Id: <1415525113-25598-2-git-send-email-b.galvani@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1415525113-25598-1-git-send-email-b.galvani@gmail.com> References: <1415525113-25598-1-git-send-email-b.galvani@gmail.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-7.4 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds documentation of device tree bindings for the Amlogic Meson SPIFC (SPI Flash Controller). Signed-off-by: Beniamino Galvani --- .../devicetree/bindings/spi/spi-meson.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-meson.txt diff --git a/Documentation/devicetree/bindings/spi/spi-meson.txt b/Documentation/devicetree/bindings/spi/spi-meson.txt new file mode 100644 index 0000000..bb52a86 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-meson.txt @@ -0,0 +1,22 @@ +Amlogic Meson SPI controllers + +* SPIFC (SPI Flash Controller) + +The Meson SPIFC is a controller optimized for communication with SPI +NOR memories, without DMA support and a 64-byte unified transmit / +receive buffer. + +Required properties: + - compatible: should be "amlogic,meson6-spifc" + - reg: physical base address and length of the controller registers + - clocks: phandle of the input clock for the baud rate generator + - #address-cells: should be 1 + - #size-cells: should be 0 + + spi@c1108c80 { + compatible = "amlogic,meson6-spifc"; + reg = <0xc1108c80 0x80>; + clocks = <&clk81>; + #address-cells = <1>; + #size-cells = <0>; + };