| Message ID | 1420213732-5141-2-git-send-email-andriy.shevchenko@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
On Fri, Jan 02, 2015 at 05:48:52PM +0200, Andy Shevchenko wrote: > According to specification the SPI1 has 5 bits for chip selects. The current > code limits it to 4 bits. The patch fixes that constant. > > Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support) > Cc: stable@vger.kernel.org > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> I'm not seeing this as an obvious candidate for stable, it seems more like a new feature really in terms of impact, and that doesn't look like the commit that's being fixed - it's the last one that refactored things but that's not the same thing.
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c index a67d37c..bd72ec6 100644 --- a/drivers/spi/spi-dw-mid.c +++ b/drivers/spi/spi-dw-mid.c @@ -270,7 +270,7 @@ int dw_spi_mid_init(struct dw_spi *dws) dws->max_freq = MRST_SPI_CLK_BASE / (clk_cdiv + 1); iounmap(clk_reg); - dws->num_cs = 16; + dws->num_cs = 32; #ifdef CONFIG_SPI_DW_MID_DMA dws->dma_priv = kzalloc(sizeof(struct mid_dma), GFP_KERNEL);
According to specification the SPI1 has 5 bits for chip selects. The current code limits it to 4 bits. The patch fixes that constant. Fixes: 7063c0d942a1 (spi/dw_spi: add DMA support) Cc: stable@vger.kernel.org Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- drivers/spi/spi-dw-mid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)