From patchwork Fri Jan 23 16:08:33 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ricardo Ribalda Delgado X-Patchwork-Id: 5695851 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 07A49C058D for ; Fri, 23 Jan 2015 16:17:18 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3D39C201F4 for ; Fri, 23 Jan 2015 16:17:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 673C9202B8 for ; Fri, 23 Jan 2015 16:17:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755618AbbAWQQr (ORCPT ); Fri, 23 Jan 2015 11:16:47 -0500 Received: from mail-la0-f44.google.com ([209.85.215.44]:33735 "EHLO mail-la0-f44.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755492AbbAWQI5 (ORCPT ); Fri, 23 Jan 2015 11:08:57 -0500 Received: by mail-la0-f44.google.com with SMTP id s18so2212043lam.3; Fri, 23 Jan 2015 08:08:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1X+MuHulJHSDdaC8ROfVMFRw96nY10k3+2AF/I6PEZQ=; b=SNipi3JPgvj/xQu1Sr387Slj15IhnYbqZVxSY/qWwWKbDdy4/Hmhv4gUV77bSruquY 9TIt7G8lGnFBJddfoKajRwwK5lAhQoDlzt4BlVSAGMtjQqWE2LclU8O9Z6EySgK+aiQy eoI093GvuM7fbp0J0TUVEfijQcrcZl5+6ky6zt75iaj43REJGpzAVvY+hlclSnwZgXNx nCKLo7WzlSh/RIbdSi7b5v8zx61+G2ffR3jb8I2rTHsQ7mhTmO7/+JB0ThJDaTDQ4ZDE xFLdidz3Xvw7pqkEjta/jA5Dy4blnPZK04W1ekMXwUGi5ROk7YLHT/G0r/nURW1KGMNf UiGA== X-Received: by 10.152.5.38 with SMTP id p6mr8089093lap.91.1422029335587; Fri, 23 Jan 2015 08:08:55 -0800 (PST) Received: from neopili.qtec.com (cpe.xe-3-0-1-778.vbrnqe10.dk.customer.tdc.net. [80.197.57.18]) by mx.google.com with ESMTPSA id h7sm542990lbl.41.2015.01.23.08.08.53 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 23 Jan 2015 08:08:53 -0800 (PST) From: Ricardo Ribalda Delgado To: Mark Brown , Michal Simek , =?UTF-8?q?S=C3=B6ren=20Brinkmann?= , linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Ricardo Ribalda Delgado Subject: [PATCH 01/18] spi/xilinx: Support for spi mode LSB_FIRST Date: Fri, 23 Jan 2015 17:08:33 +0100 Message-Id: <1422029330-10971-2-git-send-email-ricardo.ribalda@gmail.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1422029330-10971-1-git-send-email-ricardo.ribalda@gmail.com> References: <1422029330-10971-1-git-send-email-ricardo.ribalda@gmail.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Hardware supports LSB_FIRST mode. Support it also in the driver. Signed-off-by: Ricardo Ribalda Delgado --- drivers/spi/spi-xilinx.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c index 79bd84f..d4edeee 100644 --- a/drivers/spi/spi-xilinx.c +++ b/drivers/spi/spi-xilinx.c @@ -34,7 +34,8 @@ #define XSPI_CR_MASTER_MODE 0x04 #define XSPI_CR_CPOL 0x08 #define XSPI_CR_CPHA 0x10 -#define XSPI_CR_MODE_MASK (XSPI_CR_CPHA | XSPI_CR_CPOL) +#define XSPI_CR_MODE_MASK (XSPI_CR_CPHA | XSPI_CR_CPOL | \ + XSPI_CR_LSB_FIRST) #define XSPI_CR_TXFIFO_RESET 0x20 #define XSPI_CR_RXFIFO_RESET 0x40 #define XSPI_CR_MANUAL_SSELECT 0x80 @@ -194,6 +195,8 @@ static void xilinx_spi_chipselect(struct spi_device *spi, int is_on) cr |= XSPI_CR_CPHA; if (spi->mode & SPI_CPOL) cr |= XSPI_CR_CPOL; + if (spi->mode & SPI_LSB_FIRST) + cr |= XSPI_CR_LSB_FIRST; xspi->write_fn(cr, xspi->regs + XSPI_CR_OFFSET); /* We do not check spi->max_speed_hz here as the SPI clock @@ -353,7 +356,7 @@ static int xilinx_spi_probe(struct platform_device *pdev) return -ENODEV; /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA; + master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; xspi = spi_master_get_devdata(master); xspi->bitbang.master = master;