From patchwork Thu Mar 12 02:31:16 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 5989741 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3C8A89F2A9 for ; Thu, 12 Mar 2015 02:31:37 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 5A1D8203B0 for ; Thu, 12 Mar 2015 02:31:36 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7B26D203AC for ; Thu, 12 Mar 2015 02:31:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751635AbbCLCbe (ORCPT ); Wed, 11 Mar 2015 22:31:34 -0400 Received: from mail-pa0-f50.google.com ([209.85.220.50]:43775 "EHLO mail-pa0-f50.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751522AbbCLCbd (ORCPT ); Wed, 11 Mar 2015 22:31:33 -0400 Received: by pablj1 with SMTP id lj1so16361192pab.10 for ; Wed, 11 Mar 2015 19:31:32 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id; bh=lpwO678q48z8ReeRDvOOG54uGLIXND6rqrx39c663Tc=; b=cxzUUwgJkLmVKjXxrFQbSoTZgUFAf1OG0F/W/FGkey69it/bN2U7il34lvYQ3FCy26 HJFC039JCw043jCmj81LfAAt7cmG4na8ZYKSnESXYXWoGaQ+RWz/eKF9kMS2OW7Jh7Mn aZ6zYkoXLpxfl5s6HyJDqcLxRewCJ44PTCbJZQUjBZRwrhnkSONt7OcqrQoQcm63HHh6 tpJIzyM0EV3W9D/+W4Fg8JfN9G+OVSB4xuN6dHgCjTIm0KmyIIFT+9arJlJUnluyeSuz cctaRmjjH2awmQq8XOri/XHOj+dNS4JE8A5GSXUp38rYnTOWIxEAsBxVc5V0wRPWmOba APAA== X-Gm-Message-State: ALoCoQkJ4FABfXuomt+efjt9npKK2el07N0a5l28NZjRzXFCFts3V19yyUHloWX1h/pvZJf6YIoA X-Received: by 10.70.10.3 with SMTP id e3mr85342620pdb.1.1426127492803; Wed, 11 Mar 2015 19:31:32 -0700 (PDT) Received: from xps-iwamatsu.renesas.com (49.14.32.202.bf.2iij.net. [202.32.14.49]) by mx.google.com with ESMTPSA id mb4sm4982523pdb.41.2015.03.11.19.31.29 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 11 Mar 2015 19:31:31 -0700 (PDT) From: Nobuhiro Iwamatsu To: broonie@kernel.org Cc: linux-sh@vger.kernel.org, linux-spi@vger.kernel.org, yoshihiro.shimoda.uh@renesas.com, Nobuhiro Iwamatsu Subject: [PATCH] spi: sh-msiof: Fix limit maximum word transfer size of FIFO size Date: Thu, 12 Mar 2015 11:31:16 +0900 Message-Id: <1426127476-18456-1-git-send-email-nobuhiro.iwamatsu.yj@renesas.com> X-Mailer: git-send-email 2.1.3 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This driver is the case of tx_buf was set or SPI_MASTER_MUST_TX is set to master_flags, will be transmit mode. However, the current code, when transmit mode and buffer is NULL, will be set to value of receive mode size. This is when the SPI_MASTER_MUST_TX is set to master_flags, sets to transmit and receive either small size of FIFO, so as not to set the actual size larger than value of FIFO. Signed-off-by: Nobuhiro Iwamatsu --- drivers/spi/spi-sh-msiof.c | 24 +++++++++++++++++++----- 1 file changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c index e57eec0..260f433 100644 --- a/drivers/spi/spi-sh-msiof.c +++ b/drivers/spi/spi-sh-msiof.c @@ -606,12 +606,26 @@ static int sh_msiof_spi_txrx_once(struct sh_msiof_spi_priv *p, { int fifo_shift; int ret; + int rx_words = min_t(int, words, p->rx_fifo_size); + int tx_words = min_t(int, words, p->tx_fifo_size); - /* limit maximum word transfer to rx/tx fifo size */ - if (tx_buf) - words = min_t(int, words, p->tx_fifo_size); - if (rx_buf) - words = min_t(int, words, p->rx_fifo_size); + /* + * limit maximum word transfer to rx/tx fifo size. + * + * If SPI_MASTER_MUST_TX was enabled in master_flags, words was + * set to small value of FIFO. + */ + if (p->chipdata->master_flags & SPI_MASTER_MUST_TX) { + if (rx_words > tx_words) + words = tx_words; + else + words = rx_words; + } else { + if (tx_buf) + words = tx_words; + if (rx_buf) + words = rx_words; + } /* the fifo contents need shifting */ fifo_shift = 32 - bits;