From patchwork Thu Apr 2 19:23:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Richardson X-Patchwork-Id: 6151361 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7C1549F398 for ; Thu, 2 Apr 2015 19:21:39 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 93A6A203A4 for ; Thu, 2 Apr 2015 19:21:38 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9CA46203AE for ; Thu, 2 Apr 2015 19:21:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753124AbbDBTVb (ORCPT ); Thu, 2 Apr 2015 15:21:31 -0400 Received: from mail-gw1-out.broadcom.com ([216.31.210.62]:40339 "EHLO mail-gw1-out.broadcom.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753402AbbDBTV3 (ORCPT ); Thu, 2 Apr 2015 15:21:29 -0400 X-IronPort-AV: E=Sophos;i="5.11,512,1422950400"; d="scan'208";a="61276589" Received: from irvexchcas08.broadcom.com (HELO IRVEXCHCAS08.corp.ad.broadcom.com) ([10.9.208.57]) by mail-gw1-out.broadcom.com with ESMTP; 02 Apr 2015 12:35:42 -0700 Received: from IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) by IRVEXCHCAS08.corp.ad.broadcom.com (10.9.208.57) with Microsoft SMTP Server (TLS) id 14.3.174.1; Thu, 2 Apr 2015 12:21:27 -0700 Received: from mail-irva-13.broadcom.com (10.10.10.20) by IRVEXCHSMTP1.corp.ad.broadcom.com (10.9.207.51) with Microsoft SMTP Server id 14.3.174.1; Thu, 2 Apr 2015 12:21:28 -0700 Received: from lbrmn-lnxub108.corp.ad.broadcom.com (unknown [10.136.4.151]) by mail-irva-13.broadcom.com (Postfix) with ESMTP id 5EE3340FE5; Thu, 2 Apr 2015 12:20:02 -0700 (PDT) From: Jonathan Richardson To: Mark Brown , Dmitry Torokhov , Anatol Pomazau CC: Jonathan Richardson , Scott Branden , Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , , , bcm-kernel-feedback-list , , Rafal Milecki Subject: [PATCH 4/4] spi: bcm-mspi: Add support to set serial baud clock rate Date: Thu, 2 Apr 2015 12:23:23 -0700 Message-ID: <1428002603-21892-5-git-send-email-jonathar@broadcom.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1428002603-21892-1-git-send-email-jonathar@broadcom.com> References: <1428002603-21892-1-git-send-email-jonathar@broadcom.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The driver wasn't setting the SPBR (serial clock baud rate) which caused it to run at the slowest speed possible. The driver now calculates the SPBR based on the reference clock frequency resulting in much faster SPI transfers. Signed-off-by: Jonathan Richardson --- drivers/spi/spi-bcm-mspi.c | 48 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/drivers/spi/spi-bcm-mspi.c b/drivers/spi/spi-bcm-mspi.c index df27449..5617b5b 100644 --- a/drivers/spi/spi-bcm-mspi.c +++ b/drivers/spi/spi-bcm-mspi.c @@ -18,10 +18,15 @@ #include #include #include +#include #include "spi-bcm-mspi.h" #define BCM_MSPI_MAX_SPI_BAUD 13500000 /* 216 MHz? */ +#define SPBR_MIN 8U +#define SPBR_MAX 255U +#define MSPI_SPCR0_LSB_OFFSET 0x200 +#define MSPI_SPCR0_LSB_SHIFT 0 /* The longest observed required wait was 19 ms */ #define BCM_MSPI_SPE_TIMEOUT_MS 80 @@ -33,7 +38,9 @@ struct bcm_mspi { void __iomem *base; struct spi_master *master; + struct clk *clk; size_t read_offset; + u32 spbr; void (*mspi_write)(struct bcm_mspi *mspi, u16 offset, u32 value); u32 (*mspi_read)(struct bcm_mspi *mspi, u16 offset); @@ -45,6 +52,15 @@ static inline unsigned int bcm_mspi_calc_timeout(size_t len) return (len * 9000 / BCM_MSPI_MAX_SPI_BAUD * 110 / 100) + 1; } +static void bcm_mspi_hw_init(struct bcm_mspi *mspi) +{ + /* Set SPBR (serial clock baud rate). */ + if (mspi->spbr) { + mspi->mspi_write(mspi, MSPI_SPCR0_LSB_OFFSET, + mspi->spbr << MSPI_SPCR0_LSB_SHIFT); + } +} + static int bcm_mspi_wait(struct bcm_mspi *mspi, unsigned int timeout_ms) { unsigned long deadline; @@ -221,6 +237,7 @@ static struct bcm_mspi *bcm_mspi_init(struct device *dev) { struct bcm_mspi *data; struct spi_master *master; + u32 desired_rate; master = spi_alloc_master(dev, sizeof(*data)); if (!master) { @@ -235,6 +252,31 @@ static struct bcm_mspi *bcm_mspi_init(struct device *dev) master->dev.of_node = dev->of_node; master->transfer_one = bcm_mspi_transfer_one; + /* + * Enable clock if provided. The frequency can be changed by setting + * SPBR (serial clock baud rate) based on the desired 'clock-frequency'. + * + * Baud rate is calculated as: mspi_clk / (2 * SPBR) where SPBR is a + * value between 1-255. If not set then it is left at the h/w default. + */ + data->clk = devm_clk_get(dev, "mspi_clk"); + if (!IS_ERR(data->clk)) { + int ret = clk_prepare_enable(data->clk); + + if (ret < 0) { + dev_err(dev, "failed to enable clock: %d\n", ret); + return 0; + } + + /* Calculate SPBR if clock-frequency provided. */ + if (of_property_read_u32(dev->of_node, "clock-frequency", + &desired_rate) >= 0) { + u32 spbr = clk_get_rate(data->clk) / (2 * desired_rate); + + data->spbr = clamp_val(spbr, SPBR_MIN, SPBR_MAX); + } + } + return data; } @@ -286,6 +328,9 @@ static int bcm_mspi_probe(struct platform_device *pdev) data->mspi_write = bcm_mspi_write; platform_set_drvdata(pdev, data); + /* Initialize SPI controller. */ + bcm_mspi_hw_init(data); + err = devm_spi_register_master(dev, data->master); if (err) goto out; @@ -360,6 +405,9 @@ static int bcm_mspi_bcma_probe(struct bcma_device *core) data->core = core; bcma_set_drvdata(core, data); + /* Initialize SPI controller. */ + bcm_mspi_hw_init(data); + err = devm_spi_register_master(&core->dev, data->master); if (err) { spi_master_put(data->master);