From patchwork Wed Jul 22 12:32:21 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Franklin Cooper X-Patchwork-Id: 6842511 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id B6BE8C05AC for ; Wed, 22 Jul 2015 12:36:29 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 95FED20722 for ; Wed, 22 Jul 2015 12:36:28 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 9900F206D7 for ; Wed, 22 Jul 2015 12:36:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751756AbbGVMeq (ORCPT ); Wed, 22 Jul 2015 08:34:46 -0400 Received: from devils.ext.ti.com ([198.47.26.153]:38694 "EHLO devils.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752271AbbGVMeo (ORCPT ); Wed, 22 Jul 2015 08:34:44 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by devils.ext.ti.com (8.13.7/8.13.7) with ESMTP id t6MCY1lO018037; Wed, 22 Jul 2015 07:34:01 -0500 Received: from DLEE70.ent.ti.com (dlee70.ent.ti.com [157.170.170.113]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6MCY1J7003605; Wed, 22 Jul 2015 07:34:01 -0500 Received: from dlep32.itg.ti.com (157.170.170.100) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.224.2; Wed, 22 Jul 2015 07:34:01 -0500 Received: from dbdmail01.india.ti.com (dbdmail01.india.ti.com [172.24.162.206]) by dlep32.itg.ti.com (8.14.3/8.13.8) with ESMTP id t6MCXxNc017776; Wed, 22 Jul 2015 07:34:00 -0500 Received: from uda0273011.am.dhcp.ti.com (uda0273011.am.dhcp.ti.com [128.247.127.17]) by dbdmail01.india.ti.com (8.14.3/8.14.3/SuSE Linux 0.8) with ESMTP id t6MCXl53002195; Wed, 22 Jul 2015 18:03:54 +0530 From: Franklin S Cooper Jr To: , , CC: , , , , , , , , , , , , Franklin S Cooper Jr Subject: [RESEND][PATCH 1/4] spi: davinci: Set prescale value based on register value Date: Wed, 22 Jul 2015 07:32:21 -0500 Message-ID: <1437568344-18889-2-git-send-email-fcooper@ti.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1437568344-18889-1-git-send-email-fcooper@ti.com> References: <1437568344-18889-1-git-send-email-fcooper@ti.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-8.1 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Within davinci_spi_get_prescale() the prescale has two meanings. First one being the calculated prescale value and then at the end translates it to the prescale value that will be written to the SPI register. At first glance this can be confusing especially when comparing the minimum prescale value against what is seen in the TRM. To simplify things make it clear that the calculated prescale value will always be based on the value that will be written into the SPI register. Signed-off-by: Franklin S Cooper Jr --- drivers/spi/spi-davinci.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/drivers/spi/spi-davinci.c b/drivers/spi/spi-davinci.c index 987afeb..b4605c4 100644 --- a/drivers/spi/spi-davinci.c +++ b/drivers/spi/spi-davinci.c @@ -255,7 +255,7 @@ static void davinci_spi_chipselect(struct spi_device *spi, int value) * This function calculates the prescale value that generates a clock rate * less than or equal to the specified maximum. * - * Returns: calculated prescale - 1 for easy programming into SPI registers + * Returns: calculated prescale value for easy programming into SPI registers * or negative error number if valid prescalar cannot be updated. */ static inline int davinci_spi_get_prescale(struct davinci_spi *dspi, @@ -263,12 +263,13 @@ static inline int davinci_spi_get_prescale(struct davinci_spi *dspi, { int ret; - ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz); + /* Subtract 1 to match what will be programmed into SPI register. */ + ret = DIV_ROUND_UP(clk_get_rate(dspi->clk), max_speed_hz) - 1; - if (ret < 1 || ret > 256) + if (ret < 0 || ret > 255) return -EINVAL; - return ret - 1; + return ret; } /**