From patchwork Fri Aug 7 07:19:51 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leilk Liu X-Patchwork-Id: 6965571 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id CB138C05AC for ; Fri, 7 Aug 2015 07:21:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id EC3312067A for ; Fri, 7 Aug 2015 07:21:29 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 0C07020688 for ; Fri, 7 Aug 2015 07:21:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756284AbbHGHUy (ORCPT ); Fri, 7 Aug 2015 03:20:54 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:54896 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1756275AbbHGHUv (ORCPT ); Fri, 7 Aug 2015 03:20:51 -0400 X-Listener-Flag: 11101 Received: from mtkhts09.mediatek.inc [(172.21.101.70)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 1510769277; Fri, 07 Aug 2015 15:20:49 +0800 Received: from mhfsdcap03.mhfswrd (10.17.3.153) by mtkhts09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 14.3.181.6; Fri, 7 Aug 2015 15:20:47 +0800 From: Leilk Liu To: Mark Brown CC: Mark Rutland , Matthias Brugger , Sascha Hauer , , , , , , Leilk Liu Subject: [PATCH v5 3/3] arm64: dts: Add spi bus dts Date: Fri, 7 Aug 2015 15:19:51 +0800 Message-ID: <1438931991-17044-4-git-send-email-leilk.liu@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1438931991-17044-1-git-send-email-leilk.liu@mediatek.com> References: <1438931991-17044-1-git-send-email-leilk.liu@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-7.0 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds MT8173 spi bus controllers into device tree. Signed-off-by: Leilk Liu --- Change in this patch: 1. "pad-select" is a vendor property, so change it to "mediatek,pad-select". 2. modify the property of clocks and clock-names. --- arch/arm64/boot/dts/mediatek/mt8173.dtsi | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi index d18ee42..066bd6a 100644 --- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi @@ -220,6 +220,15 @@ bias-disable; }; }; + + spi_pins_a: spi0 { + pins_spi { + pinmux = , + , + , + ; + }; + }; }; scpsys: scpsys@10006000 { @@ -365,6 +374,20 @@ status = "disabled"; }; + spi: spi@1100a000 { + compatible = "mediatek,mt8173-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0 0x1100a000 0 0x1000>; + interrupts = ; + clocks = <&topckgen CLK_TOP_SPI_SEL>, <&topckgen CLK_TOP_SYSPLL3_D2>; + clock-names = "spi-clk", "parent-clk"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_pins_a>; + mediatek,pad-select = <0>; + status = "disabled"; + }; + i2c3: i2c3@11010000 { compatible = "mediatek,mt8173-i2c"; reg = <0 0x11010000 0 0x70>,