From patchwork Sun Nov 8 11:03:23 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Weseloh X-Patchwork-Id: 7578161 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 1D45E9F1AF for ; Sun, 8 Nov 2015 11:03:44 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 34B012054A for ; Sun, 8 Nov 2015 11:03:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 45E842053B for ; Sun, 8 Nov 2015 11:03:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750788AbbKHLDl (ORCPT ); Sun, 8 Nov 2015 06:03:41 -0500 Received: from mail-wi0-f178.google.com ([209.85.212.178]:35673 "EHLO mail-wi0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750716AbbKHLDl (ORCPT ); Sun, 8 Nov 2015 06:03:41 -0500 Received: by wiby19 with SMTP id y19so81308wib.0 for ; Sun, 08 Nov 2015 03:03:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oWsyV/8qCyEMOD3IvkUHDsqMFR8HJnNTikVxC6URM5s=; b=Zc3KE/qUs860vAKRDKYz1FSGjKlOTgM+OLiOuiOjUwNslteG106+NkWVV54Svu195F /voAp5MEzrpNMU5ss281YnR7bwItS4p5XQ2q0DvwsAbk4YCQ3jO3T7VdRWfIrcuNt1p/ ETrx1i5SirDLflOIIv6BUvhk1e0RfRV1AMNpe5XLXZh9C6HvW6J7hk2i2TOpD1k5XaDp Scmkh7aXuhvu4gTNpNxKT9joOKdmWeOtna0aMk5cZBV9KINgNgmkJnn2rmrXNV5O8HvX sHnyIxsER6FYPcdwSIrHR+O9ovKzi2rxG4Y+jS1JqFMhf50Q2fa0YgEB7roWfB6N0s+D W8ag== X-Received: by 10.194.142.45 with SMTP id rt13mr26853683wjb.45.1446980619999; Sun, 08 Nov 2015 03:03:39 -0800 (PST) Received: from speedy.fritz.box (p578E86D2.dip0.t-ipconnect.de. [87.142.134.210]) by smtp.gmail.com with ESMTPSA id y77sm8345087wme.15.2015.11.08.03.03.38 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 08 Nov 2015 03:03:39 -0800 (PST) From: Marcus Weseloh To: Maxime Ripard Cc: Mark Brown , linux-spi@vger.kernel.org, linux-sunxi@googlegroups.com, Marcus Weseloh Subject: [PATCH v2] spi: sun4i: allow transfers to set transmission speed Date: Sun, 8 Nov 2015 12:03:23 +0100 Message-Id: <1446980603-27435-1-git-send-email-mweseloh42@gmail.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Allow transfers to set the transmission speed rather than using the device max_speed_hz value. The SPI core makes sure that the speed_hz value is always set on the transfer. Signed-off-by: Marcus Weseloh --- Changes from v1: * Remove fallback to spi->max_speed_hz and sanity checks (as requested by Mark Brown) * Also patch identical code in sun6i-spi.c --- drivers/spi/spi-sun4i.c | 8 ++++---- drivers/spi/spi-sun6i.c | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index fbb0a4d..f60a6d6 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -229,8 +229,8 @@ static int sun4i_spi_transfer_one(struct spi_master *master, /* Ensure that we have a parent clock fast enough */ mclk_rate = clk_get_rate(sspi->mclk); - if (mclk_rate < (2 * spi->max_speed_hz)) { - clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz); + if (mclk_rate < (2 * tfr->speed_hz)) { + clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); mclk_rate = clk_get_rate(sspi->mclk); } @@ -248,14 +248,14 @@ static int sun4i_spi_transfer_one(struct spi_master *master, * First try CDR2, and if we can't reach the expected * frequency, fall back to CDR1. */ - div = mclk_rate / (2 * spi->max_speed_hz); + div = mclk_rate / (2 * tfr->speed_hz); if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { if (div > 0) div--; reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS; } else { - div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz); + div = ilog2(mclk_rate) - ilog2(tfr->speed_hz); reg = SUN4I_CLK_CTL_CDR1(div); } diff --git a/drivers/spi/spi-sun6i.c b/drivers/spi/spi-sun6i.c index ac48f59..42e2c4b 100644 --- a/drivers/spi/spi-sun6i.c +++ b/drivers/spi/spi-sun6i.c @@ -217,8 +217,8 @@ static int sun6i_spi_transfer_one(struct spi_master *master, /* Ensure that we have a parent clock fast enough */ mclk_rate = clk_get_rate(sspi->mclk); - if (mclk_rate < (2 * spi->max_speed_hz)) { - clk_set_rate(sspi->mclk, 2 * spi->max_speed_hz); + if (mclk_rate < (2 * tfr->speed_hz)) { + clk_set_rate(sspi->mclk, 2 * tfr->speed_hz); mclk_rate = clk_get_rate(sspi->mclk); } @@ -236,14 +236,14 @@ static int sun6i_spi_transfer_one(struct spi_master *master, * First try CDR2, and if we can't reach the expected * frequency, fall back to CDR1. */ - div = mclk_rate / (2 * spi->max_speed_hz); + div = mclk_rate / (2 * tfr->speed_hz); if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) { if (div > 0) div--; reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS; } else { - div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz); + div = ilog2(mclk_rate) - ilog2(tfr->speed_hz); reg = SUN6I_CLK_CTL_CDR1(div); }