From patchwork Tue Jan 5 20:46:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcus Weseloh X-Patchwork-Id: 7960811 Return-Path: X-Original-To: patchwork-linux-spi@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 51EB39F1C0 for ; Tue, 5 Jan 2016 20:46:54 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 719AE20251 for ; Tue, 5 Jan 2016 20:46:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 982A0200CF for ; Tue, 5 Jan 2016 20:46:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752306AbcAEUqi (ORCPT ); Tue, 5 Jan 2016 15:46:38 -0500 Received: from mail-wm0-f47.google.com ([74.125.82.47]:34355 "EHLO mail-wm0-f47.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751956AbcAEUqf (ORCPT ); Tue, 5 Jan 2016 15:46:35 -0500 Received: by mail-wm0-f47.google.com with SMTP id u188so37796198wmu.1; Tue, 05 Jan 2016 12:46:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=yR9rx+rG/OGkZZJ7fEKYjAXTKw9hfOQFeKX4NfqHsq0=; b=QX9vCBIQDLXLrzHdcD/ecqTOKVWdWlKxQXrtACxgwxFQ6Mpowe2I5yCsGShRf4aiCc vaXDnupz1oryNCS2vWu+bQaFyF2EgnKvse0fuUF/VfWXPjWXbb8r8gpPHuMqza0Vyh1X mif7uUfeePCsCx6GsSZ4lHv95umY1HuYGR53NeYAgSZd9558Ck3lal8YD1hX9i6Jqsp5 4/FSNyGbyU/AanA1SII7Ij613jYAVNthaTigmxYGraRBnNy43Arx+fn+acT+0golVJSY Rzi0fDLUI3/pA0F19ThPP+mazDOzg11+3MrnmJ3iM5S521ti9LiVsbidBlf7fTR50AkX ss4g== X-Received: by 10.28.1.210 with SMTP id 201mr6246460wmb.90.1452026793892; Tue, 05 Jan 2016 12:46:33 -0800 (PST) Received: from speedy.fritz.box (p578E81D5.dip0.t-ipconnect.de. [87.142.129.213]) by smtp.gmail.com with ESMTPSA id 67sm5267102wmp.20.2016.01.05.12.46.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 05 Jan 2016 12:46:32 -0800 (PST) From: Marcus Weseloh To: linux-sunxi@googlegroups.com Cc: Marcus Weseloh , Mark Brown , Maxime Ripard , Chen-Yu Tsai , linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2] spi: sun4i: Prevent chip-select from being activated twice before a transfer Date: Tue, 5 Jan 2016 21:46:20 +0100 Message-Id: <1452026780-8819-1-git-send-email-mweseloh42@gmail.com> X-Mailer: git-send-email 1.9.1 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, T_DKIM_INVALID, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The SPI core calls set_cs before a transfer, but the SUN4I_CTL_CS_MANUAL flag is only set in transfer_one. This leads to the following pattern on the chip-select line (with runtime power-management on every transfer, without it only on the first one): activate, deactivate, activate, transfer, deactivate Moving the configuration of the SUN4I_CTL_CS_MANUAL flag from transfer_one to set_cs removes the double activation. Signed-off-by: Marcus Weseloh Acked-by: Maxime Ripard --- Changes from v1: - Added Maximes Acked-by --- drivers/spi/spi-sun4i.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-sun4i.c b/drivers/spi/spi-sun4i.c index fbb0a4d..a6d936c 100644 --- a/drivers/spi/spi-sun4i.c +++ b/drivers/spi/spi-sun4i.c @@ -140,6 +140,9 @@ static void sun4i_spi_set_cs(struct spi_device *spi, bool enable) reg &= ~SUN4I_CTL_CS_MASK; reg |= SUN4I_CTL_CS(spi->chip_select); + /* We want to control the chip select manually */ + reg |= SUN4I_CTL_CS_MANUAL; + if (enable) reg |= SUN4I_CTL_CS_LEVEL; else @@ -222,9 +225,6 @@ static int sun4i_spi_transfer_one(struct spi_master *master, else reg |= SUN4I_CTL_DHB; - /* We want to control the chip select manually */ - reg |= SUN4I_CTL_CS_MANUAL; - sun4i_spi_write(sspi, SUN4I_CTL_REG, reg); /* Ensure that we have a parent clock fast enough */