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Tue, 24 May 2016 14:34:49 +0530 (IST) From: Naga Sureshkumar Relli To: , , , CC: , , "Naga Sureshkumar Relli" Subject: [PATCH 2/3] spi: xilinx: Add QUAD support Date: Tue, 24 May 2016 14:34:48 +0530 Message-ID: <1464080688-25158-1-git-send-email-nagasure@xilinx.com> X-Mailer: git-send-email 2.1.1 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22342.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(438002)(199003)(189002)(9170700003)(103686003)(47776003)(63266004)(46386002)(106466001)(50466002)(2201001)(48376002)(50226002)(87936001)(5008740100001)(52956003)(19580395003)(42186005)(90966002)(229853001)(45336002)(4001430100002)(19580405001)(86362001)(575784001)(1220700001)(92566002)(189998001)(6806005)(36756003)(586003)(107886002)(4326007)(50986999)(8936002)(33646002)(5001770100001)(81166006)(5003940100001)(2906002)(8676002)(11100500001)(4001450100002)(107986001); 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Ip=[149.199.60.100]; Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL2NAM02HT200 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch adds QUAD mode support to axi spi controller. updated supported mode bits to SPI_TX_QUAD and SPI_RX_QUAD. Signed-off-by: Naga Sureshkumar Relli --- drivers/spi/spi-xilinx.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-xilinx.c b/drivers/spi/spi-xilinx.c index bc12e0c..8dd4577 100644 --- a/drivers/spi/spi-xilinx.c +++ b/drivers/spi/spi-xilinx.c @@ -74,6 +74,7 @@ /* Number of data lines used to receive */ #define XSPI_RX_ONE_WIRE 1 +#define XSPI_RX_FOUR_WIRE 4 /** * struct xilinx_spi - This definition define spi driver instance @@ -558,8 +559,10 @@ static int xilinx_spi_probe(struct platform_device *pdev) xspi->tx_fifo = xspi_fill_tx_fifo_32; xspi->rx_fifo = xspi_read_rx_fifo_32; } + } else if (xspi->rx_bus_width == XSPI_RX_FOUR_WIRE) { + master->mode_bits |= SPI_TX_QUAD | SPI_RX_QUAD; } else { - dev_err(&pdev->dev, "Dual/Quad Modes are not supported\n"); + dev_err(&pdev->dev, "Dual Mode not supported\n"); goto put_master; } xspi->cs_inactive = 0xffffffff;