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Tue, 24 May 2016 14:34:54 +0530 (IST) From: Naga Sureshkumar Relli To: , , , CC: , , "Naga Sureshkumar Relli" Subject: [PATCH 3/3] spi: xilinx: Update devicetree bindings for spi-xilinx Date: Tue, 24 May 2016 14:34:54 +0530 Message-ID: <1464080694-25207-1-git-send-email-nagasure@xilinx.com> X-Mailer: git-send-email 2.1.1 X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.0.0.1202-22342.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-Forefront-Antispam-Report: CIP:149.199.60.100; IPV:NLI; CTRY:US; EFV:NLI; SFV:NSPM; SFS:(10009020)(6009001)(2980300002)(438002)(189002)(199003)(9170700003)(81166006)(92566002)(8936002)(45336002)(46386002)(2201001)(8676002)(87936001)(86362001)(15650500001)(52956003)(103686003)(42186005)(48376002)(5001770100001)(50466002)(107886002)(189998001)(50986999)(36756003)(47776003)(229853001)(106466001)(33646002)(63266004)(11100500001)(5003940100001)(50226002)(2906002)(586003)(1220700001)(4001430100002)(4001450100002)(5008740100001)(4326007)(6806005)(19580395003)(19580405001)(90966002)(107986001); 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Ip=[149.199.60.100]; Helo=[xsj-pvapsmtpgw02] X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SN1NAM02HT255 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Update bindings for spi-xilinx. as per spi-bus.txt rename num-ss-bits to num-cs. and add fifo-size and bits-per-word properties. Signed-off-by: Naga Sureshkumar Relli --- Documentation/devicetree/bindings/spi/spi-xilinx.txt | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/spi-xilinx.txt b/Documentation/devicetree/bindings/spi/spi-xilinx.txt index c7b7856..539bbe9 100644 --- a/Documentation/devicetree/bindings/spi/spi-xilinx.txt +++ b/Documentation/devicetree/bindings/spi/spi-xilinx.txt @@ -7,9 +7,11 @@ Required properties: - interrupts : Property with a value describing the interrupt number. - interrupt-parent : Must be core interrupt controller +- fifo-size : Depth of TX/RX Fifos Optional properties: -- xlnx,num-ss-bits : Number of chip selects used. +- num-cs : Number of chip selects used. +- bits-per-word : Number of bits per word. Example: axi_quad_spi@41e00000 { @@ -17,6 +19,8 @@ Example: interrupt-parent = <&intc>; interrupts = <0 31 1>; reg = <0x41e00000 0x10000>; - xlnx,num-ss-bits = <0x1>; + num-cs = <0x1>; + fifo-size = <256>; + bits-per-word = <8>; };