| Message ID | 1467749525-100594-1-git-send-email-andriy.shevchenko@linux.intel.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | ca80ef718b12eebe247b776d4b97a5e571bb489d |
| Headers | show |
On Tue, Jul 05, 2016 at 11:12:05PM +0300, Andy Shevchenko wrote: > The commit 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on > Intel Braswell") introduces a support of chipselects for Intel Braswell SPI > host controller. Though it missed to convert the PCI part of the driver. That was actually on purpose - it requires some sort of firmware support or alternatively a board file which we do not have for Braswell in the first place. > Do conversion here which enables both chipselects on Intel Braswell when > enumerated via PCI. > > We don't care about num_chipselect value since it is overrided inside core > driver. > > Cc: Mika Westerberg <mika.westerberg@linux.intel.com> > Fixes: 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on Intel Braswell") So I don't think this Fixes: is needed here but it should not cause any harm if it gets backported to stable kernels. Either way, Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> > Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> > --- > drivers/spi/spi-pxa2xx-pci.c | 6 +++--- > 1 file changed, 3 insertions(+), 3 deletions(-) > > diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c > index 5953edc..f3df522 100644 > --- a/drivers/spi/spi-pxa2xx-pci.c > +++ b/drivers/spi/spi-pxa2xx-pci.c > @@ -127,21 +127,21 @@ static struct pxa_spi_info spi_info_configs[] = { > .rx_param = &byt_rx_param, > }, > [PORT_BSW0] = { > - .type = LPSS_BYT_SSP, > + .type = LPSS_BSW_SSP, > .port_id = 0, > .setup = lpss_spi_setup, > .tx_param = &bsw0_tx_param, > .rx_param = &bsw0_rx_param, > }, > [PORT_BSW1] = { > - .type = LPSS_BYT_SSP, > + .type = LPSS_BSW_SSP, > .port_id = 1, > .setup = lpss_spi_setup, > .tx_param = &bsw1_tx_param, > .rx_param = &bsw1_rx_param, > }, > [PORT_BSW2] = { > - .type = LPSS_BYT_SSP, > + .type = LPSS_BSW_SSP, > .port_id = 2, > .setup = lpss_spi_setup, > .tx_param = &bsw2_tx_param, > -- > 2.8.1 -- To unsubscribe from this list: send the line "unsubscribe linux-spi" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c index 5953edc..f3df522 100644 --- a/drivers/spi/spi-pxa2xx-pci.c +++ b/drivers/spi/spi-pxa2xx-pci.c @@ -127,21 +127,21 @@ static struct pxa_spi_info spi_info_configs[] = { .rx_param = &byt_rx_param, }, [PORT_BSW0] = { - .type = LPSS_BYT_SSP, + .type = LPSS_BSW_SSP, .port_id = 0, .setup = lpss_spi_setup, .tx_param = &bsw0_tx_param, .rx_param = &bsw0_rx_param, }, [PORT_BSW1] = { - .type = LPSS_BYT_SSP, + .type = LPSS_BSW_SSP, .port_id = 1, .setup = lpss_spi_setup, .tx_param = &bsw1_tx_param, .rx_param = &bsw1_rx_param, }, [PORT_BSW2] = { - .type = LPSS_BYT_SSP, + .type = LPSS_BSW_SSP, .port_id = 2, .setup = lpss_spi_setup, .tx_param = &bsw2_tx_param,
The commit 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on Intel Braswell") introduces a support of chipselects for Intel Braswell SPI host controller. Though it missed to convert the PCI part of the driver. Do conversion here which enables both chipselects on Intel Braswell when enumerated via PCI. We don't care about num_chipselect value since it is overrided inside core driver. Cc: Mika Westerberg <mika.westerberg@linux.intel.com> Fixes: 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on Intel Braswell") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> --- drivers/spi/spi-pxa2xx-pci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)