From patchwork Tue Jul 5 20:12:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Shevchenko X-Patchwork-Id: 9215175 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id D14366048B for ; Tue, 5 Jul 2016 20:12:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BA280283FC for ; Tue, 5 Jul 2016 20:12:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id AE907283FE; Tue, 5 Jul 2016 20:12:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 450D0283FC for ; Tue, 5 Jul 2016 20:12:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751986AbcGEUMJ (ORCPT ); Tue, 5 Jul 2016 16:12:09 -0400 Received: from mga03.intel.com ([134.134.136.65]:26324 "EHLO mga03.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751105AbcGEUMJ (ORCPT ); Tue, 5 Jul 2016 16:12:09 -0400 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP; 05 Jul 2016 13:12:08 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,315,1464678000"; d="scan'208";a="134305110" Received: from black.fi.intel.com ([10.237.72.93]) by fmsmga004.fm.intel.com with ESMTP; 05 Jul 2016 13:12:07 -0700 Received: by black.fi.intel.com (Postfix, from userid 1003) id 07D9610D; Tue, 5 Jul 2016 23:12:05 +0300 (EEST) From: Andy Shevchenko To: linux-spi@vger.kernel.org, Mark Brown Cc: Andy Shevchenko , Mika Westerberg Subject: [PATCH v1 1/1] spi: pxa2xx-pci: Support both chipselects on Braswell Date: Tue, 5 Jul 2016 23:12:05 +0300 Message-Id: <1467749525-100594-1-git-send-email-andriy.shevchenko@linux.intel.com> X-Mailer: git-send-email 2.8.1 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The commit 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on Intel Braswell") introduces a support of chipselects for Intel Braswell SPI host controller. Though it missed to convert the PCI part of the driver. Do conversion here which enables both chipselects on Intel Braswell when enumerated via PCI. We don't care about num_chipselect value since it is overrided inside core driver. Cc: Mika Westerberg Fixes: 30f3a6ab44d8 ("spi: pxa2xx: Add support for both chip selects on Intel Braswell") Signed-off-by: Andy Shevchenko Acked-by: Mika Westerberg --- drivers/spi/spi-pxa2xx-pci.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/spi/spi-pxa2xx-pci.c b/drivers/spi/spi-pxa2xx-pci.c index 5953edc..f3df522 100644 --- a/drivers/spi/spi-pxa2xx-pci.c +++ b/drivers/spi/spi-pxa2xx-pci.c @@ -127,21 +127,21 @@ static struct pxa_spi_info spi_info_configs[] = { .rx_param = &byt_rx_param, }, [PORT_BSW0] = { - .type = LPSS_BYT_SSP, + .type = LPSS_BSW_SSP, .port_id = 0, .setup = lpss_spi_setup, .tx_param = &bsw0_tx_param, .rx_param = &bsw0_rx_param, }, [PORT_BSW1] = { - .type = LPSS_BYT_SSP, + .type = LPSS_BSW_SSP, .port_id = 1, .setup = lpss_spi_setup, .tx_param = &bsw1_tx_param, .rx_param = &bsw1_rx_param, }, [PORT_BSW2] = { - .type = LPSS_BYT_SSP, + .type = LPSS_BSW_SSP, .port_id = 2, .setup = lpss_spi_setup, .tx_param = &bsw2_tx_param,