| Message ID | 1561023046-20886-3-git-send-email-masonccyang@mxic.com.tw (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | spi: Add Renesas R-Car Gen3 RPC-IF SPI driver | expand |
On Thu, 20 Jun 2019 17:30:46 +0800, Mason Yang wrote: > Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> > --- > .../devicetree/bindings/spi/spi-renesas-rpc.txt | 43 ++++++++++++++++++++++ > 1 file changed, 43 insertions(+) > create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > Reviewed-by: Rob Herring <robh@kernel.org>
Hi Mason, On Thu, Jun 20, 2019 at 11:08 AM Mason Yang <masonccyang@mxic.com.tw> wrote: > Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller. > > Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> Thanks for your patch! > index 0000000..e8edf99 > --- /dev/null > +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt > @@ -0,0 +1,43 @@ > +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings > +--------------------------------------------------------- > + > +Required properties: > +- compatible: should be an SoC-specific compatible value, followed by > + "renesas,rcar-gen3-rpc" as a fallback. > + supported SoC-specific values are: > + "renesas,r8a77980-rpc" (R-Car V3H) > + "renesas,r8a77995-rpc" (R-Car D3) > +- reg: should contain three register areas: > + first for the base address of RPC-IF registers, > + second for the direct mapping read mode and > + third for the write buffer area. > +- reg-names: should contain "regs", "dirmap" and "wbuf" > +- clocks: should contain the clock phandle/specifier pair for the module clock. > +- clock-names: should contain "rpc" > +- power-domain: should contain the power domain phandle/secifier pair. power-domains > +- resets: should contain the reset controller phandle/specifier pair. > +- #address-cells: should be 1 > +- #size-cells: should be 0 > + > +Example: > + > + rpc: spi@ee200000 { > + compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc"; > + reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>, > + <0 0xee208000 0 0x100>; > + reg-names = "regs", "dirmap", "wbuf"; > + clocks = <&cpg CPG_MOD 917>; > + clock-names = "rpc"; > + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; > + resets = <&cpg 917>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + flash@0 { The subnode is not documented above. > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <40000000>; > + spi-tx-bus-width = <1>; > + spi-rx-bus-width = <1>; > + }; > + }; Gr{oetje,eeting}s, Geert
Hi Geert,
Thanks for your review!
Will fix it as
+Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings
+---------------------------------------------------------
+
+Required properties:
+- compatible: should be an SoC-specific compatible value, followed by
+ "renesas,rcar-gen3-rpc" as a fallback.
+ supported SoC-specific values are:
+ "renesas,r8a77980-rpc" (R-Car
V3H)
+ "renesas,r8a77995-rpc" (R-Car
D3)
+- reg: should contain three register areas:
+ first for the base address of RPC-IF registers,
+ second for the direct mapping read mode and
+ third for the write buffer area.
+- reg-names: should contain "regs", "dirmap" and "wbuf"
+- clocks: should contain the clock phandle/specifier pair for the module
clock.
+- clock-names: should contain "rpc"
+- power-domains: should contain the power domain phandle/secifier pair.
+- resets: should contain the reset controller phandle/specifier pair.
+- #address-cells: should be 1
+- #size-cells: should be 0
+
+ flash: should be represented by a subnode of the RPC-IF node,
+ which "compatible" property contains "jedec,spi-nor", it presents SPI
is used.
+
+Example:
+
+ rpc: spi@ee200000 {
+ compatible = "renesas,r8a77995-rpc",
"renesas,rcar-gen3-rpc";
+ reg = <0 0xee200000 0 0x200>, <0
0x08000000 0 0x4000000>,
+ <0 0xee208000 0 0x100>;
+ reg-names = "regs", "dirmap", "wbuf";
+ clocks = <&cpg CPG_MOD 917>;
+ clock-names = "rpc";
+ power-domains = <&sysc
R8A77995_PD_ALWAYS_ON>;
+ resets = <&cpg 917>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ compatible =
"jedec,spi-nor";
+ reg = <0>;
+ spi-max-frequency =
<40000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <1>;
+ };
+ };
Is it OK ?
thanks & best regards,
Mason
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diff --git a/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt new file mode 100644 index 0000000..e8edf99 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt @@ -0,0 +1,43 @@ +Renesas R-Car Gen3 RPC-IF controller Device Tree Bindings +--------------------------------------------------------- + +Required properties: +- compatible: should be an SoC-specific compatible value, followed by + "renesas,rcar-gen3-rpc" as a fallback. + supported SoC-specific values are: + "renesas,r8a77980-rpc" (R-Car V3H) + "renesas,r8a77995-rpc" (R-Car D3) +- reg: should contain three register areas: + first for the base address of RPC-IF registers, + second for the direct mapping read mode and + third for the write buffer area. +- reg-names: should contain "regs", "dirmap" and "wbuf" +- clocks: should contain the clock phandle/specifier pair for the module clock. +- clock-names: should contain "rpc" +- power-domain: should contain the power domain phandle/secifier pair. +- resets: should contain the reset controller phandle/specifier pair. +- #address-cells: should be 1 +- #size-cells: should be 0 + +Example: + + rpc: spi@ee200000 { + compatible = "renesas,r8a77995-rpc", "renesas,rcar-gen3-rpc"; + reg = <0 0xee200000 0 0x200>, <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + clocks = <&cpg CPG_MOD 917>; + clock-names = "rpc"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + spi-tx-bus-width = <1>; + spi-rx-bus-width = <1>; + }; + };
Dcument the bindings used by the Renesas R-Car Gen3 RPC-IF controller. Signed-off-by: Mason Yang <masonccyang@mxic.com.tw> --- .../devicetree/bindings/spi/spi-renesas-rpc.txt | 43 ++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-renesas-rpc.txt