@@ -268,7 +268,6 @@ struct stm32_spi_cfg {
* @base: virtual memory area
* @clk: hw kernel clock feeding the SPI clock generator
* @clk_rate: rate of the hw kernel clock feeding the SPI clock generator
- * @rst: SPI controller reset line
* @lock: prevent I/O concurrent access
* @irq: SPI controller interrupt line
* @fifo_size: size of the embedded fifo in bytes
@@ -294,7 +293,6 @@ struct stm32_spi {
void __iomem *base;
struct clk *clk;
u32 clk_rate;
- struct reset_control *rst;
spinlock_t lock; /* prevent I/O concurrent access */
int irq;
unsigned int fifo_size;
@@ -1831,6 +1829,7 @@ static int stm32_spi_probe(struct platform_device *pdev)
struct spi_master *master;
struct stm32_spi *spi;
struct resource *res;
+ struct reset_control *rst;
int ret;
master = spi_alloc_master(&pdev->dev, sizeof(struct stm32_spi));
@@ -1892,11 +1891,11 @@ static int stm32_spi_probe(struct platform_device *pdev)
goto err_clk_disable;
}
- spi->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
- if (!IS_ERR(spi->rst)) {
- reset_control_assert(spi->rst);
+ rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
+ if (!IS_ERR(rst)) {
+ reset_control_assert(rst);
udelay(2);
- reset_control_deassert(spi->rst);
+ reset_control_deassert(rst);
}
if (spi->cfg->has_fifo)