From patchwork Tue Jun 28 19:33:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Masanari Iida X-Patchwork-Id: 9203925 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 57ACF60757 for ; Tue, 28 Jun 2016 19:33:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4826F28616 for ; Tue, 28 Jun 2016 19:33:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 3C36A2861C; Tue, 28 Jun 2016 19:33:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=2.0 tests=BAYES_00, DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, T_DKIM_INVALID autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id C847328616 for ; Tue, 28 Jun 2016 19:33:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752202AbcF1Tdv (ORCPT ); Tue, 28 Jun 2016 15:33:51 -0400 Received: from mail-pf0-f195.google.com ([209.85.192.195]:33635 "EHLO mail-pf0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752251AbcF1Tdu (ORCPT ); Tue, 28 Jun 2016 15:33:50 -0400 Received: by mail-pf0-f195.google.com with SMTP id c74so2492739pfb.0; Tue, 28 Jun 2016 12:33:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=rWjYH67mTqnMtlCIO3sa8fsu7qM2w9jAVozOKihFGOw=; b=UaFjUCQjVux/N1/qoffz4pJcoe1FmpGOGaP3Ivly3cOXlAt07R64wUm9gGzRN0R5KM JNAoMJxL5tVP7m4ecm7RjadGKZkkcOH35A/JAXlpOrZBegwPbCKu0zxS/zLR7lz/wStI KDG9kGYbeusf5tgAMP4ICaoqbVPr2pAOVZ4Tc4HwQLqGA1FD93RBh8kbL1ITvYSmje79 c65Y+W4vySPL5BQPUlW8tazgUM9CcJfatqikzWvKwM7WDPaFu0/2+M0mNJtn216uypLz hnMrfgwkaqnLLIhePDqFBsT9lxDtHU+lpbsEMAfTRkOIaifr/aQxMXv5xYCMXnbczI8+ GQdQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=rWjYH67mTqnMtlCIO3sa8fsu7qM2w9jAVozOKihFGOw=; b=mv+wkmcp/KhIs9QVHRh1aC9JbLhAUewBa/JiLfdx1geqFnX1Fd+BCBFgvGhoVE08gc csBnU+F3BAj3Ca7DGXkvPTyE5I1cQwZaBQHX6X1CVUl+ARNFe/Tb3Ao8upBKk/IHP51G xn8kTMetOSoAPAsDD6k9Hp92ITS4kPvHGMVKdI+xKeUnbXsXc6P8f3pvoooRkdiluhZm GRceP+3q3r6P9AD1kW827ha5s6q+aKoieLGPxFco/DjXz0eWhNHK2R9/HDT34BQ2xfDL 5nGS/e844Hq1V4D9ZsKOBfeU6kKnfpRgxib+KvmP/zyhWFqNlanc6NFdi1Sb/X1Aq+Gu VYFA== X-Gm-Message-State: ALyK8tL+TSo9ez7OfN3yzFnp5AKCQBBivCUOmSLjr6QFY1YmFx+yQvCdugtJxKwEI8EKdw== X-Received: by 10.98.32.148 with SMTP id m20mr4674153pfj.77.1467142417620; Tue, 28 Jun 2016 12:33:37 -0700 (PDT) Received: from masabert (i118-21-156-233.s30.a048.ap.plala.or.jp. [118.21.156.233]) by smtp.gmail.com with ESMTPSA id b67sm1414557pfg.85.2016.06.28.12.33.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 28 Jun 2016 12:33:37 -0700 (PDT) Received: by masabert (Postfix, from userid 1000) id E938FE5285; Wed, 29 Jun 2016 04:33:34 +0900 (JST) From: Masanari Iida To: linux-spi@vger.kernel.org, broonie@kernel.org, linux-kernel@vger.kernel.org, balbi@ti.com Cc: Masanari Iida Subject: [PATCH] Doc: spi: Fix typo in devicetree/bindings/spi Date: Wed, 29 Jun 2016 04:33:33 +0900 Message-Id: <20160628193333.3971-1-standby24x7@gmail.com> X-Mailer: git-send-email 2.9.0.137.gcf4c2cf Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch fix spelling typos found in Documentation/devicetree/bingings/spi. Signed-off-by: Masanari Iida --- Documentation/devicetree/bindings/spi/spi-davinci.txt | 2 +- Documentation/devicetree/bindings/spi/ti_qspi.txt | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/spi/spi-davinci.txt b/Documentation/devicetree/bindings/spi/spi-davinci.txt index d1e914adcf6e..f5916c92fe91 100644 --- a/Documentation/devicetree/bindings/spi/spi-davinci.txt +++ b/Documentation/devicetree/bindings/spi/spi-davinci.txt @@ -21,7 +21,7 @@ Required properties: IP to the interrupt controller within the SoC. Possible values are 0 and 1. Manual says one of the two possible interrupt lines can be tied to the interrupt controller. Set this - based on a specifc SoC configuration. + based on a specific SoC configuration. - interrupts: interrupt number mapped to CPU. - clocks: spi clk phandle diff --git a/Documentation/devicetree/bindings/spi/ti_qspi.txt b/Documentation/devicetree/bindings/spi/ti_qspi.txt index 50b14f6b53a3..e65fde4a7388 100644 --- a/Documentation/devicetree/bindings/spi/ti_qspi.txt +++ b/Documentation/devicetree/bindings/spi/ti_qspi.txt @@ -20,7 +20,7 @@ Optional properties: chipselect register and offset of that register. NOTE: TI QSPI controller requires different pinmux and IODelay -paramaters for Mode-0 and Mode-3 operations, which needs to be set up by +parameters for Mode-0 and Mode-3 operations, which needs to be set up by the bootloader (U-Boot). Default configuration only supports Mode-0 operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be specified in the slave nodes of TI QSPI controller without appropriate