From patchwork Thu Dec 8 14:58:45 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 9466501 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id F1DC26071E for ; Thu, 8 Dec 2016 14:59:14 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E289C28526 for ; Thu, 8 Dec 2016 14:59:14 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D554428589; Thu, 8 Dec 2016 14:59:14 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3F5C628526 for ; Thu, 8 Dec 2016 14:59:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753580AbcLHO7N (ORCPT ); Thu, 8 Dec 2016 09:59:13 -0500 Received: from mail.free-electrons.com ([62.4.15.54]:45494 "EHLO mail.free-electrons.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752016AbcLHO7M (ORCPT ); Thu, 8 Dec 2016 09:59:12 -0500 Received: by mail.free-electrons.com (Postfix, from userid 110) id C667820C1D; Thu, 8 Dec 2016 15:59:10 +0100 (CET) Received: from latitudeE7470 (LStLambert-657-1-97-87.w90-63.abo.wanadoo.fr [90.63.216.87]) by mail.free-electrons.com (Postfix) with ESMTPSA id A950720C18; Thu, 8 Dec 2016 15:59:10 +0100 (CET) From: Romain Perier To: Mark Brown , linux-spi@vger.kernel.org Cc: Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , devicetree@vger.kernel.org, Rob Herring , Ian Campbell , Pawel Moll , Mark Rutland , Kumar Gala , linux-arm-kernel@lists.infradead.org, Thomas Petazzoni , Nadav Haklai , xigu@marvell.com, dingwei@marvell.com, Romain Perier Subject: [PATCH v4 2/4] spi: armada-3700: Add documentation for the Armada 3700 SPI Controller Date: Thu, 8 Dec 2016 15:58:45 +0100 Message-Id: <20161208145847.7794-3-romain.perier@free-electrons.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20161208145847.7794-1-romain.perier@free-electrons.com> References: <20161208145847.7794-1-romain.perier@free-electrons.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This adds the devicetree bindings documentation for the SPI controller present in the Marvell Armada 3700 SoCs. Signed-off-by: Romain Perier Tested-by: Gregory CLEMENT Acked-by: Rob Herring --- Changes in v4: - Added tag "Acked-by" by Rob Herring Changes in v3: - Added tag "Tested-by" by Gregory - Fixed commit title, as requested by Mark Brown .../devicetree/bindings/spi/spi-armada-3700.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/spi/spi-armada-3700.txt diff --git a/Documentation/devicetree/bindings/spi/spi-armada-3700.txt b/Documentation/devicetree/bindings/spi/spi-armada-3700.txt new file mode 100644 index 0000000..1564aa8 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/spi-armada-3700.txt @@ -0,0 +1,25 @@ +* Marvell Armada 3700 SPI Controller + +Required Properties: + +- compatible: should be "marvell,armada-3700-spi" +- reg: physical base address of the controller and length of memory mapped + region. +- interrupts: The interrupt number. The interrupt specifier format depends on + the interrupt controller and of its driver. +- clocks: Must contain the clock source, usually from the North Bridge clocks. +- num-cs: The number of chip selects that is supported by this SPI Controller +- #address-cells: should be 1. +- #size-cells: should be 0. + +Example: + + spi0: spi@10600 { + compatible = "marvell,armada-3700-spi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x10600 0x5d>; + clocks = <&nb_perih_clk 7>; + interrupts = ; + num-cs = <4>; + };