From patchwork Thu Jun 8 05:16:02 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Wang, Jiada" X-Patchwork-Id: 9773883 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 699D660393 for ; Thu, 8 Jun 2017 05:17:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5CC5625D9E for ; Thu, 8 Jun 2017 05:17:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5182128508; Thu, 8 Jun 2017 05:17:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BD01625D9E for ; Thu, 8 Jun 2017 05:17:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752397AbdFHFQe (ORCPT ); Thu, 8 Jun 2017 01:16:34 -0400 Received: from relay1.mentorg.com ([192.94.38.131]:65221 "EHLO relay1.mentorg.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750788AbdFHFQM (ORCPT ); Thu, 8 Jun 2017 01:16:12 -0400 Received: from svr-orw-fem-03.mgc.mentorg.com ([147.34.97.39]) by relay1.mentorg.com with esmtp id 1dIpnn-0004yB-7G from Jiada_Wang@mentor.com ; Wed, 07 Jun 2017 22:16:11 -0700 Received: from jiwang-OptiPlex-980.tokyo.mentorg.com (147.34.91.1) by svr-orw-fem-03.mgc.mentorg.com (147.34.97.39) with Microsoft SMTP Server id 14.3.224.2; Wed, 7 Jun 2017 22:16:10 -0700 From: Jiada Wang To: , , , , , CC: , , , Subject: [PATCH linux-next v4 3/4] ARM: dts: imx: change compatibility for SPI controllers on imx53 later soc Date: Thu, 8 Jun 2017 14:16:02 +0900 Message-ID: <20170608051603.16070-4-jiada_wang@mentor.com> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170608051603.16070-1-jiada_wang@mentor.com> References: <20170608051603.16070-1-jiada_wang@mentor.com> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP for SPI controllers on imx53 and later SoCs, there is HW issue when work in slave mode, as new device type 'IMX53_ECSPI' has been added for these SPI controllers which is compatible with 'fsl,imx53-ecspi'. This patch updates DTS to make imx53 later SPI controller only be compatibile with 'fsl,imx53-ecspi'. Signed-off-by: Jiada Wang --- arch/arm/boot/dts/imx53.dtsi | 4 ++-- arch/arm/boot/dts/imx6q.dtsi | 2 +- arch/arm/boot/dts/imx6qdl.dtsi | 8 ++++---- arch/arm/boot/dts/imx6sl.dtsi | 8 ++++---- arch/arm/boot/dts/imx6sx.dtsi | 8 ++++---- arch/arm/boot/dts/imx6ul.dtsi | 8 ++++---- 6 files changed, 19 insertions(+), 19 deletions(-) diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi index 2e516f4..9eeafb9 100644 --- a/arch/arm/boot/dts/imx53.dtsi +++ b/arch/arm/boot/dts/imx53.dtsi @@ -243,7 +243,7 @@ ecspi1: ecspi@50010000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx53-ecspi"; reg = <0x50010000 0x4000>; interrupts = <36>; clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, @@ -662,7 +662,7 @@ ecspi2: ecspi@63fac000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx53-ecspi"; reg = <0x63fac000 0x4000>; interrupts = <37>; clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi index dd33849..b214442 100644 --- a/arch/arm/boot/dts/imx6q.dtsi +++ b/arch/arm/boot/dts/imx6q.dtsi @@ -90,7 +90,7 @@ ecspi5: ecspi@02018000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6q-ecspi", "fsl,imx53-ecspi"; reg = <0x02018000 0x4000>; interrupts = <0 35 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6Q_CLK_ECSPI5>, diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi index f325411..ac19c58 100644 --- a/arch/arm/boot/dts/imx6qdl.dtsi +++ b/arch/arm/boot/dts/imx6qdl.dtsi @@ -266,7 +266,7 @@ ecspi1: ecspi@02008000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6q-ecspi", "fsl,imx53-ecspi"; reg = <0x02008000 0x4000>; interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_ECSPI1>, @@ -280,7 +280,7 @@ ecspi2: ecspi@0200c000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6q-ecspi", "fsl,imx53-ecspi"; reg = <0x0200c000 0x4000>; interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_ECSPI2>, @@ -294,7 +294,7 @@ ecspi3: ecspi@02010000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6q-ecspi", "fsl,imx53-ecspi"; reg = <0x02010000 0x4000>; interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_ECSPI3>, @@ -308,7 +308,7 @@ ecspi4: ecspi@02014000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6q-ecspi", "fsl,imx53-ecspi"; reg = <0x02014000 0x4000>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6QDL_CLK_ECSPI4>, diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi index 3243af4..d9b9053 100644 --- a/arch/arm/boot/dts/imx6sl.dtsi +++ b/arch/arm/boot/dts/imx6sl.dtsi @@ -168,7 +168,7 @@ ecspi1: ecspi@02008000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sl-ecspi", "fsl,imx53-ecspi"; reg = <0x02008000 0x4000>; interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SL_CLK_ECSPI1>, @@ -180,7 +180,7 @@ ecspi2: ecspi@0200c000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sl-ecspi", "fsl,imx53-ecspi"; reg = <0x0200c000 0x4000>; interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SL_CLK_ECSPI2>, @@ -192,7 +192,7 @@ ecspi3: ecspi@02010000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sl-ecspi", "fsl,imx53-ecspi"; reg = <0x02010000 0x4000>; interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SL_CLK_ECSPI3>, @@ -204,7 +204,7 @@ ecspi4: ecspi@02014000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sl-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sl-ecspi", "fsl,imx53-ecspi"; reg = <0x02014000 0x4000>; interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clks IMX6SL_CLK_ECSPI4>, diff --git a/arch/arm/boot/dts/imx6sx.dtsi b/arch/arm/boot/dts/imx6sx.dtsi index f16b9df..149ef79 100644 --- a/arch/arm/boot/dts/imx6sx.dtsi +++ b/arch/arm/boot/dts/imx6sx.dtsi @@ -251,7 +251,7 @@ ecspi1: ecspi@02008000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sx-ecspi", "fsl,imx53-ecspi"; reg = <0x02008000 0x4000>; interrupts = ; clocks = <&clks IMX6SX_CLK_ECSPI1>, @@ -263,7 +263,7 @@ ecspi2: ecspi@0200c000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sx-ecspi", "fsl,imx53-ecspi"; reg = <0x0200c000 0x4000>; interrupts = ; clocks = <&clks IMX6SX_CLK_ECSPI2>, @@ -275,7 +275,7 @@ ecspi3: ecspi@02010000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sx-ecspi", "fsl,imx53-ecspi"; reg = <0x02010000 0x4000>; interrupts = ; clocks = <&clks IMX6SX_CLK_ECSPI3>, @@ -287,7 +287,7 @@ ecspi4: ecspi@02014000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6sx-ecspi", "fsl,imx53-ecspi"; reg = <0x02014000 0x4000>; interrupts = ; clocks = <&clks IMX6SX_CLK_ECSPI4>, diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 6da2b77..7226061 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -204,7 +204,7 @@ ecspi1: ecspi@02008000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6ul-ecspi", "fsl,imx53-ecspi"; reg = <0x02008000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_ECSPI1>, @@ -216,7 +216,7 @@ ecspi2: ecspi@0200c000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6ul-ecspi", "fsl,imx53-ecspi"; reg = <0x0200c000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_ECSPI2>, @@ -228,7 +228,7 @@ ecspi3: ecspi@02010000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6ul-ecspi", "fsl,imx53-ecspi"; reg = <0x02010000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_ECSPI3>, @@ -240,7 +240,7 @@ ecspi4: ecspi@02014000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,imx6ul-ecspi", "fsl,imx51-ecspi"; + compatible = "fsl,imx6ul-ecspi", "fsl,imx53-ecspi"; reg = <0x02014000 0x4000>; interrupts = ; clocks = <&clks IMX6UL_CLK_ECSPI4>,