From patchwork Tue Apr 10 22:44:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 10334335 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A048C601A0 for ; Tue, 10 Apr 2018 22:44:54 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 908FD2853A for ; Tue, 10 Apr 2018 22:44:54 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 84F132853E; Tue, 10 Apr 2018 22:44:54 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 183582853C for ; Tue, 10 Apr 2018 22:44:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756124AbeDJWow (ORCPT ); Tue, 10 Apr 2018 18:44:52 -0400 Received: from mail.bootlin.com ([62.4.15.54]:34647 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756125AbeDJWos (ORCPT ); Tue, 10 Apr 2018 18:44:48 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id CD0E420D97; Wed, 11 Apr 2018 00:44:46 +0200 (CEST) Received: from localhost.localdomain (unknown [91.160.177.164]) by mail.bootlin.com (Postfix) with ESMTPSA id 6C4F520867; Wed, 11 Apr 2018 00:44:46 +0200 (CEST) From: Boris Brezillon To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , Cyrille Pitchen , linux-mtd@lists.infradead.org, Miquel Raynal , Mark Brown , linux-spi@vger.kernel.org Cc: Peter Pan , Frieder Schrempf , Vignesh R , Yogesh Gaur , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Kamal Dasu , Sourav Poddar , Maxime Chevallier Subject: [PATCH v2 07/10] spi: bcm53xx: Implement the spi_mem interface Date: Wed, 11 Apr 2018 00:44:36 +0200 Message-Id: <20180410224439.9260-8-boris.brezillon@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180410224439.9260-1-boris.brezillon@bootlin.com> References: <20180410224439.9260-1-boris.brezillon@bootlin.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The spi_mem interface is meant to replace the spi_flash_read() one. Implement the ->exec_op() method so that we can smoothly get rid of the old interface. Note that the current ->flash_read() implementation looks a bit fragile since it does not take the ->read_opcode passed by the spi-nor layer into account, which means if might not work with all kind of NORs. Anyway, I left the logic unchanged and added a few extra checks to make sure we're receiving something that looks like a NOR read operation. Signed-off-by: Boris Brezillon --- Changes in v2: - include spi-mem.h - treat op->addr.val differently since it's now an u64 --- drivers/spi/spi-bcm2835.c | 1 + drivers/spi/spi-bcm53xx.c | 36 +++++++++++++++++++++++++++++++++++- 2 files changed, 36 insertions(+), 1 deletion(-) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index f35cc10772f6..41ed371eaf15 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -37,6 +37,7 @@ #include #include #include +#include /* SPI register offsets */ #define BCM2835_SPI_CS 0x00 diff --git a/drivers/spi/spi-bcm53xx.c b/drivers/spi/spi-bcm53xx.c index d02ceb7a29d1..016059d3160b 100644 --- a/drivers/spi/spi-bcm53xx.c +++ b/drivers/spi/spi-bcm53xx.c @@ -257,6 +257,38 @@ static int bcm53xxspi_transfer_one(struct spi_master *master, return 0; } +static int bcm53xxspi_exec_mem_op(struct spi_mem *mem, + const struct spi_mem_op *op) +{ + struct bcm53xxspi *b53spi = spi_master_get_devdata(mem->spi->master); + u32 from; + + /* + * FIXME: There's nothing in this driver programming the opcode and + * buswidth to be used when a read is done on the mmio window, but it + * seems to be used to access a SPI NOR device, so restrict access + * access to SPINOR_OP_READ commands. + */ + if (!op->data.nbytes || op->data.dir != SPI_MEM_DATA_IN || + op->addr.nbytes != 3 || op->cmd.opcode != 0x3) + return -ENOTSUPP; + + /* Return -ENOTSUPP so that the core can fall back to normal reads. */ + from = op->addr.val; + if (from + op->data.nbytes > BCM53XXSPI_FLASH_WINDOW) + return -ENOTSUPP; + + bcm53xxspi_enable_bspi(b53spi); + memcpy_fromio(op->data.buf.in, b53spi->mmio_base + from, + op->data.nbytes); + + return 0; +} + +static const struct spi_controller_mem_ops bcm53xxspi_mem_ops = { + .exec_op = bcm53xxspi_exec_mem_op, +}; + static int bcm53xxspi_flash_read(struct spi_device *spi, struct spi_flash_read_message *msg) { @@ -311,8 +343,10 @@ static int bcm53xxspi_bcma_probe(struct bcma_device *core) master->dev.of_node = dev->of_node; master->transfer_one = bcm53xxspi_transfer_one; - if (b53spi->mmio_base) + if (b53spi->mmio_base) { + master->mem_ops = &bcm53xxspi_mem_ops; master->spi_flash_read = bcm53xxspi_flash_read; + } bcma_set_drvdata(core, b53spi);