From patchwork Fri Oct 12 08:48:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 10638063 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 616741508 for ; Fri, 12 Oct 2018 08:48:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 52B652B740 for ; Fri, 12 Oct 2018 08:48:52 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 475532B751; Fri, 12 Oct 2018 08:48:52 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD4FA2B740 for ; Fri, 12 Oct 2018 08:48:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727885AbeJLQUO (ORCPT ); Fri, 12 Oct 2018 12:20:14 -0400 Received: from mail.bootlin.com ([62.4.15.54]:43076 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727808AbeJLQUO (ORCPT ); Fri, 12 Oct 2018 12:20:14 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 0D34920DEE; Fri, 12 Oct 2018 10:48:48 +0200 (CEST) Received: from localhost.localdomain (AAubervilliers-681-1-7-245.w90-88.abo.wanadoo.fr [90.88.129.245]) by mail.bootlin.com (Postfix) with ESMTPSA id B7D50208B5; Fri, 12 Oct 2018 10:48:28 +0200 (CEST) From: Boris Brezillon To: David Woodhouse , Brian Norris , Boris Brezillon , Marek Vasut , Richard Weinberger , linux-mtd@lists.infradead.org, Yogesh Gaur , Vignesh R , Cyrille Pitchen Cc: Julien Su , Mason Yang , , Mark Brown , linux-spi@vger.kernel.org Subject: [PATCH RFC 04/18] spi: spi-mem: Prepare things for dual bytes opcodes support Date: Fri, 12 Oct 2018 10:48:11 +0200 Message-Id: <20181012084825.23697-5-boris.brezillon@bootlin.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20181012084825.23697-1-boris.brezillon@bootlin.com> References: <20181012084825.23697-1-boris.brezillon@bootlin.com> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some SPI NORs are using 2bytes opcodes when operated in OPI (Octo Peripheral Interface). Make opcode an u16 and add an nbytes field to specify the number of opcode bytes. Also add the SPI_MEM_OP_[DTR_]CMD_16B() to declare 2bytes opcodes and update spi_mem_default_supports_op() to reject operations with 2 bytes opcodes. Signed-off-by: Boris Brezillon --- drivers/spi/spi-mem.c | 5 ++++- include/linux/spi/spi-mem.h | 21 ++++++++++++++++++++- 2 files changed, 24 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-mem.c b/drivers/spi/spi-mem.c index 3da57219b539..10bb852cfaea 100644 --- a/drivers/spi/spi-mem.c +++ b/drivers/spi/spi-mem.c @@ -157,6 +157,9 @@ static bool spi_mem_default_supports_op(struct spi_mem *mem, if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) return false; + if (op->cmd.nbytes != 1) + return false; + return true; } EXPORT_SYMBOL_GPL(spi_mem_default_supports_op); @@ -171,7 +174,7 @@ static bool spi_mem_buswidth_is_valid(u8 buswidth) static int spi_mem_check_op(const struct spi_mem_op *op) { - if (!op->cmd.buswidth) + if (!op->cmd.buswidth || op->cmd.nbytes < 1 || op->cmd.nbytes > 2) return -EINVAL; if ((op->addr.nbytes && !op->addr.buswidth) || diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h index cad116005034..af54a1c91f93 100644 --- a/include/linux/spi/spi-mem.h +++ b/include/linux/spi/spi-mem.h @@ -17,12 +17,29 @@ { \ .buswidth = __buswidth, \ .opcode = __opcode, \ + .nbytes = 1, \ } #define SPI_MEM_OP_DTR_CMD(__opcode, __buswidth) \ { \ .buswidth = __buswidth, \ .opcode = __opcode, \ + .nbytes = 1, \ + .dtr = true, \ + } + +#define SPI_MEM_OP_CMD_16B(__opcode, __buswidth) \ + { \ + .buswidth = __buswidth, \ + .opcode = __opcode, \ + .nbytes = 2, \ + } + +#define SPI_MEM_OP_DTR_CMD_16B(__opcode, __buswidth) \ + { \ + .buswidth = __buswidth, \ + .opcode = __opcode, \ + .nbytes = 2, \ .dtr = true, \ } @@ -107,6 +124,7 @@ enum spi_mem_data_dir { /** * struct spi_mem_op - describes a SPI memory operation + * @cmd.nbytes: number of opcode bytes (only 1 or 2 are valid) * @cmd.buswidth: number of IO lines used to transmit the command * @cmd.dtr: set true to transfer opcode in double transfer rate mode * @cmd.opcode: operation opcode @@ -132,9 +150,10 @@ enum spi_mem_data_dir { */ struct spi_mem_op { struct { + u8 nbytes; u8 buswidth; bool dtr; - u8 opcode; + u16 opcode; } cmd; struct {