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[79.136.29.16]) by smtp.gmail.com with ESMTPSA id o17sm3677287lff.77.2019.01.29.12.55.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 29 Jan 2019 12:55:07 -0800 (PST) From: Jonas Bonn To: linux-kernel@vger.kernel.org Cc: Jonas Bonn , Nicolas Ferre , Mark Brown , Alexandre Belloni , Ludovic Desroches , linux-spi@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 2/2] spi-atmel: support inter-word delay Date: Tue, 29 Jan 2019 21:55:02 +0100 Message-Id: <20190129205502.7741-3-jonas@norrbonn.se> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190129205502.7741-1-jonas@norrbonn.se> References: <20190129205502.7741-1-jonas@norrbonn.se> MIME-Version: 1.0 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP If the SPI slave requires an inter-word delay, configure the DLYBCT register accordingly. Tested on a SAMA5D2 board (derived from SAMA5D2-Xplained reference board). Signed-off-by: Jonas Bonn CC: Nicolas Ferre CC: Mark Brown CC: Alexandre Belloni CC: Ludovic Desroches CC: linux-spi@vger.kernel.org CC: linux-arm-kernel@lists.infradead.org Acked-by: Nicolas Ferre --- drivers/spi/spi-atmel.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c index f53f0c5e63da..57cc7110f9e8 100644 --- a/drivers/spi/spi-atmel.c +++ b/drivers/spi/spi-atmel.c @@ -1201,13 +1201,14 @@ static int atmel_spi_setup(struct spi_device *spi) csr |= SPI_BIT(CSAAT); /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs. - * - * DLYBCT would add delays between words, slowing down transfers. - * It could potentially be useful to cope with DMA bottlenecks, but - * in those cases it's probably best to just use a lower bitrate. */ csr |= SPI_BF(DLYBS, 0); - csr |= SPI_BF(DLYBCT, 0); + + /* DLYBCT adds delays between words. This is useful for slow devices + * that need a bit of time to setup the next transfer. + */ + csr |= SPI_BF(DLYBCT, + (as->spi_clk / 1000000 * spi->word_delay_us) >> 5); asd = spi->controller_state; if (!asd) {