| Message ID | 20190130150818.24902-8-tudor.ambarus@microchip.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | spi: atmel-quadspi: introduce sam9x60 qspi contoller | expand |
On Wed, 30 Jan 2019 15:08:43 +0000 <Tudor.Ambarus@microchip.com> wrote: > From: Tudor Ambarus <tudor.ambarus@microchip.com> > > Introduced in: > commit b60557876849 ("ARM: dts: at91: sama5d2: switch to new clock binding") > > Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <bbrezillon@kernel.org> > --- > Documentation/devicetree/bindings/spi/atmel-quadspi.txt | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt > index b93c1e2f25dd..e9dae6264d89 100644 > --- a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt > +++ b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt > @@ -19,7 +19,7 @@ spi@f0020000 { > reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>; > reg-names = "qspi_base", "qspi_mmap"; > interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; > - clocks = <&spi0_clk>; > + clocks = <&pmc PMC_TYPE_PERIPHERAL 52>; > #address-cells = <1>; > #size-cells = <0>; > pinctrl-names = "default";
diff --git a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt index b93c1e2f25dd..e9dae6264d89 100644 --- a/Documentation/devicetree/bindings/spi/atmel-quadspi.txt +++ b/Documentation/devicetree/bindings/spi/atmel-quadspi.txt @@ -19,7 +19,7 @@ spi@f0020000 { reg = <0xf0020000 0x100>, <0xd0000000 0x8000000>; reg-names = "qspi_base", "qspi_mmap"; interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&spi0_clk>; + clocks = <&pmc PMC_TYPE_PERIPHERAL 52>; #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default";