From patchwork Tue Apr 23 20:15:12 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Martin Sperl X-Patchwork-Id: 10913717 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 198D61515 for ; Tue, 23 Apr 2019 20:15:44 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0C258286F1 for ; Tue, 23 Apr 2019 20:15:44 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 00C05288E8; Tue, 23 Apr 2019 20:15:43 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9645E286F1 for ; Tue, 23 Apr 2019 20:15:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726339AbfDWUPn (ORCPT ); Tue, 23 Apr 2019 16:15:43 -0400 Received: from 212-186-180-163.static.upcbusiness.at ([212.186.180.163]:33362 "EHLO cgate.sperl.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725956AbfDWUPn (ORCPT ); Tue, 23 Apr 2019 16:15:43 -0400 Received: from hc1.intern.sperl.org (account martin@sperl.org [10.10.10.59] verified) by sperl.org (CommuniGate Pro SMTP 6.2.1 _community_) with ESMTPSA id 7763607; Tue, 23 Apr 2019 20:15:33 +0000 From: kernel@martin.sperl.org To: Mark Brown , Eric Anholt , Stefan Wahren , linux-spi@vger.kernel.org, linux-rpi-kernel@lists.infradead.org, linux-arm-kernel@lists.infradead.org Cc: Martin Sperl Subject: [PATCH V2 5/6] spi: bcm2835: make the lower limit for dma mode configurable Date: Tue, 23 Apr 2019 20:15:12 +0000 Message-Id: <20190423201513.8073-6-kernel@martin.sperl.org> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190423201513.8073-1-kernel@martin.sperl.org> References: <20190423201513.8073-1-kernel@martin.sperl.org> Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Martin Sperl Under some circumstances the default 96 byte limit is not optimal. The polling and interrupt mode of the spi-bcm2835 controller exhibit a 1 idle clock cycle which is missing when using DMA. So when transferring a longer spi_transfer to some low spec MCU devices without SPI FIFOs like a ATMega it means that the SPI has to get reduced by a factor of 2 or more when using DMA mode compared to using PIO modes to give the MCU enough time to handle the incoming spi byte and prepare the next byte to get delivered - these extra 4+ CPU cycles that the idle spi clock is providing allows bigger transfers to work at faster speeds (assuming highly optimized MCU code). So forcing the transfer to use PIO mode to geth this behaviour for longer transfers is of advantage. The oposite is true when (ab)using the spi MOSI line alone to control a WS2812B RGB LED stripe, where the DMA mode makes it possible to use the MOSI lines alone (with correct encoding) to control the LED. So both extremes have there use cases and with this patch we allow to control the policy on a controller wide basis. Right now we only allow to control the limit on a controller wide basis, but in the future it may be possible to configure this on a per spi_device basis. Signed-off-by: Martin Sperl --- drivers/spi/spi-bcm2835.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/spi/spi-bcm2835.c b/drivers/spi/spi-bcm2835.c index 2d702db8689c..755e1e6d2252 100644 --- a/drivers/spi/spi-bcm2835.c +++ b/drivers/spi/spi-bcm2835.c @@ -73,7 +73,6 @@ #define BCM2835_SPI_FIFO_SIZE 64 #define BCM2835_SPI_FIFO_SIZE_3_4 48 -#define BCM2835_SPI_DMA_MIN_LENGTH 96 #define BCM2835_SPI_MODE_BITS (SPI_CPOL | SPI_CPHA | SPI_CS_HIGH \ | SPI_NO_CS | SPI_3WIRE) @@ -85,6 +84,12 @@ module_param(polling_limit_us, uint, 0664); MODULE_PARM_DESC(polling_limit_us, "time in us to run a transfer in polling mode\n"); +/* define minimum transfer length for which we may use DMA */ +unsigned int dma_min_bytes_limit = 96; +module_param(dma_min_bytes_limit, uint, 0664); +MODULE_PARM_DESC(dma_min_bytes_limit, + "minimum number of bytes to run a transfer in dma mode - 0 disables dma-mode completely\n"); + /** * struct bcm2835_spi - BCM2835 SPI controller * @regs: base address of register map @@ -631,7 +636,7 @@ static bool bcm2835_spi_can_dma(struct spi_master *master, struct spi_transfer *tfr) { /* we start DMA efforts only on bigger transfers */ - if (tfr->len < BCM2835_SPI_DMA_MIN_LENGTH) + if (!dma_min_bytes_limit || tfr->len < dma_min_bytes_limit) return false; /* BCM2835_SPI_DLEN has defined a max transfer size as