diff mbox series

[v1,8/8] spi: dw: Add Elkhart Lake PSE DMA support

Message ID 20200506153025.21441-8-andriy.shevchenko@linux.intel.com (mailing list archive)
State Accepted
Commit 22d48ad7bfacda05900c3f7b43510fc4d40d5d53
Headers show
Series [v1,1/8] spi: dw: Zero DMA Tx and Rx configurations on stack | expand

Commit Message

Andy Shevchenko May 6, 2020, 3:30 p.m. UTC 
From: Jarkko Nikula <jarkko.nikula@linux.intel.com>

Elkhart Lake PSE SPI is capable to utilize PSE DMA engine which is described
in ACPI. With help of acpi-dma module the support becomes a generic one.

Thus, add Elkhart Lake PSE DMA support and generic DMA hooks in SPI DesignWare
driver.

Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
---
 drivers/spi/spi-dw-mid.c | 44 ++++++++++++++++++++++++++++++++++++++++
 drivers/spi/spi-dw-pci.c |  1 +
 drivers/spi/spi-dw.h     |  1 +
 3 files changed, 46 insertions(+)
diff mbox series

Patch

diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index d73aa4ae644d5..f3c85f92ef12c 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -75,6 +75,24 @@  static int mid_spi_dma_init_mfld(struct device *dev, struct dw_spi *dws)
 	return -EBUSY;
 }
 
+static int mid_spi_dma_init_generic(struct device *dev, struct dw_spi *dws)
+{
+	dws->rxchan = dma_request_slave_channel(dev, "rx");
+	if (!dws->rxchan)
+		return -ENODEV;
+	dws->master->dma_rx = dws->rxchan;
+
+	dws->txchan = dma_request_slave_channel(dev, "tx");
+	if (!dws->txchan) {
+		dma_release_channel(dws->rxchan);
+		return -ENODEV;
+	}
+	dws->master->dma_tx = dws->txchan;
+
+	dws->dma_inited = 1;
+	return 0;
+}
+
 static void mid_spi_dma_exit(struct dw_spi *dws)
 {
 	if (!dws->dma_inited)
@@ -291,8 +309,25 @@  static void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws)
 	dws->dma_rx = &mid_dma_rx;
 	dws->dma_ops = &mfld_dma_ops;
 }
+
+static const struct dw_spi_dma_ops generic_dma_ops = {
+	.dma_init	= mid_spi_dma_init_generic,
+	.dma_exit	= mid_spi_dma_exit,
+	.dma_setup	= mid_spi_dma_setup,
+	.can_dma	= mid_spi_can_dma,
+	.dma_transfer	= mid_spi_dma_transfer,
+	.dma_stop	= mid_spi_dma_stop,
+};
+
+static void dw_spi_mid_setup_dma_generic(struct dw_spi *dws)
+{
+	dws->dma_tx = &mid_dma_tx;
+	dws->dma_rx = &mid_dma_rx;
+	dws->dma_ops = &generic_dma_ops;
+}
 #else	/* CONFIG_SPI_DW_MID_DMA */
 static inline void dw_spi_mid_setup_dma_mfld(struct dw_spi *dws) {}
+static inline void dw_spi_mid_setup_dma_generic(struct dw_spi *dws) {}
 #endif
 
 /* Some specific info for SPI0 controller on Intel MID */
@@ -329,3 +364,12 @@  int dw_spi_mid_init_mfld(struct dw_spi *dws)
 	dw_spi_mid_setup_dma_mfld(dws);
 	return 0;
 }
+
+int dw_spi_mid_init_generic(struct dw_spi *dws)
+{
+	/* Register hook to configure CTRLR0 */
+	dws->update_cr0 = dw_spi_update_cr0;
+
+	dw_spi_mid_setup_dma_generic(dws);
+	return 0;
+}
diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index dd59df5122ee7..dde54a918b5d2 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -35,6 +35,7 @@  static struct spi_pci_desc spi_pci_mid_desc_2 = {
 };
 
 static struct spi_pci_desc spi_pci_ehl_desc = {
+	.setup = dw_spi_mid_init_generic,
 	.num_cs = 2,
 	.bus_num = -1,
 	.max_freq = 100000000,
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 642f0be642e56..490cff260a3eb 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -261,5 +261,6 @@  extern u32 dw_spi_update_cr0_v1_01a(struct spi_controller *master,
 
 /* platform related setup */
 extern int dw_spi_mid_init_mfld(struct dw_spi *dws);
+extern int dw_spi_mid_init_generic(struct dw_spi *dws);
 
 #endif /* DW_SPI_HEADER_H */