Message ID | 20200520163053.24357-3-p.yadav@ti.com (mailing list archive) |
---|---|
State | Superseded |
Headers | show
Return-Path: <SRS0=UFBu=7C=vger.kernel.org=linux-spi-owner@kernel.org> Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4F903159A for <patchwork-linux-spi@patchwork.kernel.org>; Wed, 20 May 2020 16:31:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 362D420759 for <patchwork-linux-spi@patchwork.kernel.org>; Wed, 20 May 2020 16:31:35 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="Ot5BtV1A" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726810AbgETQbe (ORCPT <rfc822;patchwork-linux-spi@patchwork.kernel.org>); Wed, 20 May 2020 12:31:34 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:58694 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726650AbgETQbc (ORCPT <rfc822;linux-spi@vger.kernel.org>); Wed, 20 May 2020 12:31:32 -0400 Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 04KGV9Li064010; Wed, 20 May 2020 11:31:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1589992270; bh=sf1taodJLPAeYagyTVLo7kxF1+8mkUMEfQy4tR56ABs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=Ot5BtV1Az4rLSW4OLTqUJ2VnMupZJR+cPuUhb+i0sM9rHjraRU/rsFtbTJwhXUA/O m3gUz3jl8d3ODcx8KXUex88JfKBuEugkBw5SrO0Dr1I1arWVGGGtWlBC/PocrEQqc2 NR7h1gaKWQ+XflmWfQq8NFlwF0s2IX0cUC0IMV5o= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 04KGV9Gn045306 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 20 May 2020 11:31:09 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Wed, 20 May 2020 11:31:09 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Wed, 20 May 2020 11:31:09 -0500 Received: from pratyush-OptiPlex-790.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 04KGUsxR001551; Wed, 20 May 2020 11:31:04 -0500 From: Pratyush Yadav <p.yadav@ti.com> To: Tudor Ambarus <tudor.ambarus@microchip.com>, Miquel Raynal <miquel.raynal@bootlin.com>, Richard Weinberger <richard@nod.at>, Vignesh Raghavendra <vigneshr@ti.com>, Mark Brown <broonie@kernel.org>, Nicolas Ferre <nicolas.ferre@microchip.com>, Alexandre Belloni <alexandre.belloni@bootlin.com>, Ludovic Desroches <ludovic.desroches@microchip.com>, Matthias Brugger <matthias.bgg@gmail.com>, <linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-mediatek@lists.infradead.org> CC: Pratyush Yadav <p.yadav@ti.com>, Sekhar Nori <nsekhar@ti.com>, Boris Brezillon <boris.brezillon@collabora.com>, Mason Yang <masonccyang@mxic.com.tw> Subject: [PATCH v6 02/19] spi: atmel-quadspi: reject DTR ops Date: Wed, 20 May 2020 22:00:36 +0530 Message-ID: <20200520163053.24357-3-p.yadav@ti.com> X-Mailer: git-send-email 2.25.0 In-Reply-To: <20200520163053.24357-1-p.yadav@ti.com> References: <20200520163053.24357-1-p.yadav@ti.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-spi-owner@vger.kernel.org Precedence: bulk List-ID: <linux-spi.vger.kernel.org> X-Mailing-List: linux-spi@vger.kernel.org |
Series |
mtd: spi-nor: add xSPI Octal DTR support
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expand
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diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c index cb44d1e169aa..4a29fa7ebdac 100644 --- a/drivers/spi/atmel-quadspi.c +++ b/drivers/spi/atmel-quadspi.c @@ -285,6 +285,10 @@ static bool atmel_qspi_supports_op(struct spi_mem *mem, op->dummy.nbytes == 0) return false; + /* DTR ops not supported. */ + if (op->cmd.dtr || op->addr.dtr || op->dummy.dtr || op->data.dtr) + return false; + return true; }
Double Transfer Rate (DTR) ops are added in spi-mem. But this controller doesn't support DTR transactions. Since we don't use the default supports_op(), which rejects all DTR ops, do that explicitly in our supports_op(). Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/spi/atmel-quadspi.c | 4 ++++ 1 file changed, 4 insertions(+)