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[2/2] spi: cadence-quadspi: Use spi_mem_dtr_supports_op()

Message ID 20210204141218.32229-2-p.yadav@ti.com (mailing list archive)
State New
Headers show
Series [1/2] spi: spi-mem: add spi_mem_dtr_supports_op() | expand

Commit Message

Pratyush Yadav Feb. 4, 2021, 2:12 p.m. UTC
Use the newly introduced spi_mem_dtr_supports_op() to check DTR op
support. This means the buswidth check does not need to be replicated.
It also happens to fix a bug where STR ops with a 2-byte opcode would be
reported as supported.

Signed-off-by: Pratyush Yadav <p.yadav@ti.com>
---

Tested on TI's J721E with MT35XU512ABA and J7200 with S28HS512T.

 drivers/spi/spi-cadence-quadspi.c | 63 ++-----------------------------
 1 file changed, 4 insertions(+), 59 deletions(-)

--
2.30.0
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Patch

diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index b7ecbc8c1caa..442cc7c53a47 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -1219,65 +1219,11 @@  static int cqspi_exec_mem_op(struct spi_mem *mem, const struct spi_mem_op *op)
 	return ret;
 }

-static int cqspi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
-{
-	u32 mode = mem->spi->mode;
-
-	switch (buswidth) {
-	case 1:
-		return 0;
-
-	case 2:
-		if ((tx &&
-		     (mode & (SPI_TX_DUAL | SPI_TX_QUAD | SPI_TX_OCTAL))) ||
-		    (!tx &&
-		     (mode & (SPI_RX_DUAL | SPI_RX_QUAD | SPI_RX_OCTAL))))
-			return 0;
-
-		break;
-
-	case 4:
-		if ((tx && (mode & (SPI_TX_QUAD | SPI_TX_OCTAL))) ||
-		    (!tx && (mode & (SPI_RX_QUAD | SPI_RX_OCTAL))))
-			return 0;
-
-		break;
-
-	case 8:
-		if ((tx && (mode & SPI_TX_OCTAL)) ||
-		    (!tx && (mode & SPI_RX_OCTAL)))
-			return 0;
-
-		break;
-
-	default:
-		break;
-	}
-
-	return -EOPNOTSUPP;
-}
-
 static bool cqspi_supports_mem_op(struct spi_mem *mem,
 				  const struct spi_mem_op *op)
 {
 	bool all_true, all_false;

-	if (cqspi_check_buswidth_req(mem, op->cmd.buswidth, true))
-		return false;
-
-	if (op->addr.nbytes &&
-	    cqspi_check_buswidth_req(mem, op->addr.buswidth, true))
-		return false;
-
-	if (op->dummy.nbytes &&
-	    cqspi_check_buswidth_req(mem, op->dummy.buswidth, true))
-		return false;
-
-	if (op->data.nbytes &&
-	    cqspi_check_buswidth_req(mem, op->data.buswidth,
-				     op->data.dir == SPI_MEM_DATA_OUT))
-		return false;
-
 	all_true = op->cmd.dtr && op->addr.dtr && op->dummy.dtr &&
 		   op->data.dtr;
 	all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr &&
@@ -1287,11 +1233,10 @@  static bool cqspi_supports_mem_op(struct spi_mem *mem,
 	if (!(all_true || all_false))
 		return false;

-	/* DTR mode opcodes should be 2 bytes. */
-	if (all_true && op->cmd.nbytes != 2)
-		return false;
-
-	return true;
+	if (all_true)
+		return spi_mem_dtr_supports_op(mem, op);
+	else
+		return spi_mem_default_supports_op(mem, op);
 }

 static int cqspi_of_get_flash_pdata(struct platform_device *pdev,